walnux/boards/risc-v/esp32c6
Martin Vajnar 3e100e3c86 esp32[c6|h2|s2|s3]: Assign Edge/Level GPIO pin numbers when in Quadrature Encoder mode
Only 2 pins are needed in this mode for both channels. The wiring
is such that Edge and Level pins are cross-connected for both
channels.
2025-05-16 11:10:29 -03:00
..
common esp32[c6|h2|s2|s3]: Assign Edge/Level GPIO pin numbers when in Quadrature Encoder mode 2025-05-16 11:10:29 -03:00
esp32c6-devkitc boards/risc-v: Add dedicated GPIO board level support for esp32[-c3|-c6|-h2] 2025-05-14 19:38:21 +02:00
esp32c6-devkitm boards/risc-v: Add board layer support of SDM for esp32[-c3|-c6|-h2] 2025-05-09 19:20:47 +08:00
esp32c6-xiao boards/risc-v/esp32c6 Add initial support to Seeed Studio XIAO ESP32c6 2025-05-09 12:54:50 +08:00