603c87977f
kasan does not instrument the assembly function, so it is checked in advance before calling. If Kasan is not turned on, the speed and space will be almost unchanged under compiler optimization. Signed-off-by: anjiahao <anjiahao@xiaomi.com>
152 lines
4.2 KiB
ArmAsm
152 lines
4.2 KiB
ArmAsm
/****************************************************************************
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* libs/libc/machine/arm/armv7-r/gnu/arch_memset.S
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-FileCopyrightText: 2013 The Android Open Source Project
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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****************************************************************************/
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#include "libc.h"
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#ifdef LIBC_BUILD_MEMSET
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.arm
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.syntax unified
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.global ARCH_LIBCFUN(memset)
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.type ARCH_LIBCFUN(memset), %function
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ARCH_LIBCFUN(memset):
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mov r3, r0
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// At this point only d0, d1 are going to be used below.
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vdup.8 q0, r1
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cmp r2, #16
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blo .L_set_less_than_16_unknown_align
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.L_check_alignment:
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// Align destination to a double word to avoid the store crossing
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// a cache line boundary.
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ands ip, r3, #7
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bne .L_do_double_word_align
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.L_double_word_aligned:
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// Duplicate since the less than 64 can use d2, d3.
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vmov q1, q0
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subs r2, #64
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blo .L_set_less_than_64
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// Duplicate the copy value so that we can store 64 bytes at a time.
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vmov q2, q0
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vmov q3, q0
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1:
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// Main loop stores 64 bytes at a time.
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subs r2, #64
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vstmia r3!, {d0 - d7}
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bge 1b
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.L_set_less_than_64:
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// Restore r2 to the count of bytes left to set.
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add r2, #64
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lsls ip, r2, #27
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bcc .L_set_less_than_32
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// Set 32 bytes.
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vstmia r3!, {d0 - d3}
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.L_set_less_than_32:
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bpl .L_set_less_than_16
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// Set 16 bytes.
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vstmia r3!, {d0, d1}
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.L_set_less_than_16:
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// Less than 16 bytes to set.
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lsls ip, r2, #29
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bcc .L_set_less_than_8
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// Set 8 bytes.
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vstmia r3!, {d0}
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.L_set_less_than_8:
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bpl .L_set_less_than_4
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// Set 4 bytes
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vst1.32 {d0[0]}, [r3]!
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.L_set_less_than_4:
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lsls ip, r2, #31
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it ne
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strbne r1, [r3], #1
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itt cs
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strbcs r1, [r3], #1
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strbcs r1, [r3]
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bx lr
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.L_do_double_word_align:
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rsb ip, ip, #8
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sub r2, r2, ip
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// Do this comparison now, otherwise we'll need to save a
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// register to the stack since we've used all available
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// registers.
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cmp ip, #4
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blo 1f
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// Need to do a four byte copy.
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movs ip, ip, lsl #31
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it mi
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strbmi r1, [r3], #1
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itt cs
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strbcs r1, [r3], #1
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strbcs r1, [r3], #1
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vst1.32 {d0[0]}, [r3]!
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b .L_double_word_aligned
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1:
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// No four byte copy.
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movs ip, ip, lsl #31
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it mi
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strbmi r1, [r3], #1
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itt cs
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strbcs r1, [r3], #1
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strbcs r1, [r3], #1
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b .L_double_word_aligned
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.L_set_less_than_16_unknown_align:
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// Set up to 15 bytes.
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movs ip, r2, lsl #29
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bcc 1f
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vst1.8 {d0}, [r3]!
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1:
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bge 2f
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vst1.32 {d0[0]}, [r3]!
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2:
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movs ip, r2, lsl #31
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it mi
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strbmi r1, [r3], #1
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itt cs
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strbcs r1, [r3], #1
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strbcs r1, [r3], #1
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bx lr
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.size ARCH_LIBCFUN(memset), . - ARCH_LIBCFUN(memset)
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#endif
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