166 lines
5.5 KiB
C
166 lines
5.5 KiB
C
/****************************************************************************
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* arch/arm/src/arm/arm_dataabort.c
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <inttypes.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include "sched/sched.h"
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#include "arm_internal.h"
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#ifdef CONFIG_LEGACY_PAGING
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# include <nuttx/page.h>
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# include "arm.h"
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_dataabort
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*
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* Input Parameters:
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* regs - The standard, ARM register save array.
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*
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* If CONFIG_LEGACY_PAGING is selected in the NuttX configuration file, then
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* these additional input values are expected:
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*
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* far - Fault address register. On a data abort, the ARM MMU places the
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* miss virtual address (MVA) into the FAR register. This is the address
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* of the data which, when accessed, caused the fault.
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* fsr - Fault status register. On a data a abort, the ARM MMU places an
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* encoded four-bit value, the fault status, along with the four-bit
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* encoded domain number, in the data FSR
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*
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* Description:
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* This is the data abort exception handler. The ARM data abort exception
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* occurs when a memory fault is detected during a data transfer.
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*
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****************************************************************************/
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#ifdef CONFIG_LEGACY_PAGING
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void arm_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
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{
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struct tcb_s *tcb = this_task();
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#ifdef CONFIG_LEGACY_PAGING
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uint32_t *saveregs;
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bool savestate;
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savestate = up_interrupt_context();
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saveregs = tcb->xcp.regs;
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#endif
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tcb->xcp.regs = regs;
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up_set_interrupt_context(true);
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#ifdef CONFIG_LEGACY_PAGING
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/* In the NuttX on-demand paging implementation, only the read-only, .text
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* section is paged. However, the ARM compiler generated PC-relative data
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* fetches from within the .text sections. Also, it is customary to locate
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* read-only data (.rodata) within the same section as .text so that it
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* does not require copying to RAM. Misses in either of these case should
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* cause a data abort.
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*
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* We are only interested in data aborts due to page translations faults.
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* Sections should already be in place and permissions should already be
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* be set correctly (to read-only) so any other data abort reason is a
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* fatal error.
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*/
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pginfo("FSR: %08" PRIx32 " FAR: %08" PRIx32 "\n", fsr, far);
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if ((fsr & FSR_MASK) != FSR_PAGE)
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{
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goto segfault;
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}
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/* Check the (virtual) address of data that caused the data abort. When
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* the exception occurred, this address was provided in the FAR register.
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* (It has not yet been saved in the register context save area).
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*/
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pginfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
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if (far < PG_PAGED_VBASE || far >= PG_PAGED_VEND)
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{
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goto segfault;
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}
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/* Save the offending data address as the fault address in the TCB of
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* the currently task. This fault address is also used by the prefetch
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* abort handling; this will allow common paging logic for both
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* prefetch and data aborts.
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*/
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tcb->xcp.far = regs[REG_R15];
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/* Call pg_miss() to schedule the page fill. A consequences of this
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* call are:
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*
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* (1) The currently executing task will be blocked and saved on
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* on the g_waitingforfill task list.
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* (2) An interrupt-level context switch will occur so that when
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* this function returns, it will return to a different task,
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* most likely the page fill worker thread.
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* (3) The page fill worker task has been signalled and should
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* execute immediately when we return from this exception.
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*/
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pg_miss();
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/* Restore the previous value of irq flag. */
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up_set_interrupt_context(savestate);
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tcb->xcp.regs = saveregs;
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return;
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segfault:
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#endif
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_alert("Data abort. "
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"PC: %08" PRIx32 " FAR: %08" PRIx32 " FSR: %08" PRIx32 "\n",
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regs[REG_PC], far, fsr);
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PANIC_WITH_REGS("panic", regs);
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}
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#else /* CONFIG_LEGACY_PAGING */
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void arm_dataabort(uint32_t *regs)
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{
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struct tcb_s *tcb = this_task();
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tcb->xcp.regs = regs;
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up_set_interrupt_context(true);
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/* Crash -- possibly showing diagnost debug information. */
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_alert("Data abort. PC: %08" PRIx32 "\n", regs[REG_PC]);
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PANIC_WITH_REGS("panic", regs);
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}
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#endif /* CONFIG_LEGACY_PAGING */
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