980 lines
No EOL
24 KiB
Text
980 lines
No EOL
24 KiB
Text
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choice
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prompt "ARM MCU selection"
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default ARCH_CHIP_STM32
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config ARCH_CHIP_A1X
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bool "Allwinner A1X"
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select ARCH_CORTEXA8
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select ARM_HAVE_NEON
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select ARCH_HAVE_IRQPRIO
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select ARCH_HAVE_LOWVECTORS
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select ARCH_HAVE_FETCHADD
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select ARCH_HAVE_SDRAM
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depends on BOOT_RUNFROMSDRAM
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select ARCH_HAVE_ADDRENV
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select ARCH_NEED_ADDRENV_MAPPING
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---help---
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Allwinner A1X family: A10, A10S (A12), A13 (ARM Cortex-A8)
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config ARCH_CHIP_AM335X
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bool "TI AM335X"
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select ARCH_CORTEXA8
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select ARM_HAVE_NEON
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select ARCH_HAVE_IRQPRIO
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select ARCH_HAVE_LOWVECTORS
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select ARCH_HAVE_FETCHADD
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select ARCH_HAVE_SDRAM
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depends on BOOT_RUNFROMSDRAM
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select ARCH_HAVE_ADDRENV
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select ARCH_NEED_ADDRENV_MAPPING
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---help---
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TI AM335X family: AM3356, AM3357, AM3358, AM3359 (ARM Cortex-A8)
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config ARCH_CHIP_FVP_ARMV8R_AARCH32
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bool "ARM FVP virt platform (ARMv8r AARCH32)"
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select ARCH_CORTEXR52
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select ARCH_HAVE_LOWVECTORS
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select ARCH_HAVE_FETCHADD
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select ARCH_HAVE_IRQPRIO
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select ARCH_HAVE_HIPRI_INTERRUPT
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select ARCH_HAVE_FPU
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---help---
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ARM FVP virt platform (ARMv8r)
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config ARCH_CHIP_C5471
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bool "TMS320 C5471"
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select ARCH_ARM7TDMI
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select ARCH_HAVE_LOWVECTORS
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select OTHER_UART_SERIALDRIVER
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---help---
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TI TMS320 C5471, A180, or DA180 (ARM7TDMI)
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config ARCH_CHIP_CSK6
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bool "LISTEANAI CSK6 6001A/6011B/6012"
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select ARCH_HAVE_MPU
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select ARCH_HAVE_FETCHADD
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select ARCH_HAVE_I2CRESET
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select ARCH_HAVE_HEAPCHECK
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select ARCH_HAVE_PROGMEM
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select ARCH_HAVE_SPI_BITORDER
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select ARCH_HAVE_TICKLESS
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select ARCH_HAVE_TIMEKEEPING
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select ARM_HAVE_MPU_UNIFIED
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select ARMV8M_HAVE_STACKCHECK
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select ARCH_HAVE_ADJTIME
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select ARCH_CORTEXM33
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---help---
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LISTEANAI CSK6 architectures (ARM Cortex-M33).
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config ARCH_CHIP_DM320
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bool "TMS320 DM320"
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select ARCH_ARM926EJS
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select ARCH_HAVE_LOWVECTORS
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---help---
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TI DMS320 DM320 (ARM926EJS)
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config ARCH_CHIP_EFM32
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bool "Energy Micro EFM32"
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select ARCH_HAVE_SPI_BITORDER
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select ARCH_HAVE_FETCHADD
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---help---
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Energy Micro EFM32 microcontrollers (ARM Cortex-M).
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config ARCH_CHIP_EOSS3
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bool "QuickLogic EOS S3"
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select ARCH_CORTEXM4
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select ARCH_HAVE_MPU
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select ARM_HAVE_MPU_UNIFIED
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select ARCH_HAVE_FPU
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---help---
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QuickLogic EOS S3 (ARM Cortex-M4)
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config ARCH_CHIP_GD32F4
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bool "GD32MCU GD32 F4"
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select ARCH_CORTEXM4
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select ARCH_HAVE_MPU
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select ARCH_HAVE_FETCHADD
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select ARCH_HAVE_I2CRESET
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select ARCH_HAVE_HEAPCHECK
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select ARCH_HAVE_PROGMEM
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select ARCH_HAVE_SPI_BITORDER
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select ARCH_HAVE_TICKLESS
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select ARM_HAVE_MPU_UNIFIED
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select ARMV7M_HAVE_STACKCHECK
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---help---
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GD32MCU GD32 architectures (ARM Cortex-M4).
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config ARCH_CHIP_IMX1
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bool "NXP/Freescale iMX.1"
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select ARCH_ARM920T
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select ARCH_HAVE_HEAP2
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select ARCH_HAVE_LOWVECTORS
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---help---
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Freescale iMX.1 architectures (ARM920T)
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config ARCH_CHIP_IMX6
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bool "NXP/Freescale iMX.6"
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select ARCH_CORTEXA9
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select ARM_THUMB
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select ARMV7A_HAVE_L2CC_PL310
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select ARM_HAVE_NEON
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select ARCH_HAVE_TRUSTZONE
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select ARCH_HAVE_LOWVECTORS
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select ARCH_HAVE_FETCHADD
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select ARCH_HAVE_SDRAM
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depends on BOOT_RUNFROMSDRAM
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select ARCH_HAVE_ADDRENV
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select ARCH_NEED_ADDRENV_MAPPING
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---help---
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Freescale iMX.6 architectures (Cortex-A9)
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config ARCH_CHIP_IMX9_CORTEX_M
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bool "NXP iMX.9 Cortex-M7"
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select ARCH_CORTEXM7
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select ARCH_HAVE_MPU
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select ARCH_HAVE_FETCHADD
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select ARCH_HAVE_RAMFUNCS
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select ARCH_HAVE_TICKLESS
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select ARCH_HAVE_I2CRESET
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select ARCH_HAVE_SPI_CS_CONTROL
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select ARM_HAVE_MPU_UNIFIED
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select ARMV7M_HAVE_STACKCHECK
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---help---
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iMX.9 architectures (Cortex-M7)
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config ARCH_CHIP_IMXRT
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bool "NXP/Freescale iMX.RT"
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select ARCH_CORTEXM7
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select ARCH_HAVE_MPU
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select ARCH_HAVE_FETCHADD
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select ARCH_HAVE_RAMFUNCS
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select ARCH_HAVE_TICKLESS
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select ARCH_HAVE_I2CRESET
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select ARCH_HAVE_SPI_CS_CONTROL
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select ARM_HAVE_MPU_UNIFIED
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select ARMV7M_HAVE_STACKCHECK
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---help---
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NXP i.MX RT (ARM Cortex-M7) architectures
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config ARCH_CHIP_KINETIS
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bool "NXP/Freescale Kinetis"
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select ARCH_CORTEXM4
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select ARCH_HAVE_MPU
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select ARM_HAVE_MPU_UNIFIED
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select ARCH_HAVE_FPU
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select ARCH_HAVE_FETCHADD
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select ARCH_HAVE_RAMFUNCS
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select ARCH_HAVE_I2CRESET
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---help---
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Freescale Kinetis Architectures (ARM Cortex-M4)
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config ARCH_CHIP_KL
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bool "NXP/Freescale Kinetis L"
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select ARCH_CORTEXM0
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---help---
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Freescale Kinetis L Architectures (ARM Cortex-M0+)
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config ARCH_CHIP_LC823450
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bool "ON Semiconductor LC823450"
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select ARCH_CORTEXM3
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select ARCH_HAVE_MPU
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select ARCH_HAVE_HEAPCHECK
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select ARCH_HAVE_MULTICPU
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select ARCH_HAVE_I2CRESET
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select ARCH_HAVE_CUSTOM_TESTSET
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---help---
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ON Semiconductor LC823450 architectures (ARM dual Cortex-M3)
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config ARCH_CHIP_LM
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bool "TI/Luminary Stellaris"
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select ARCH_HAVE_MPU
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select ARM_HAVE_MPU_UNIFIED
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---help---
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TI/Luminary Stellaris LMS3 and LM4F architectures (ARM Cortex-M3/4)
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config ARCH_CHIP_LPC17XX_40XX
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bool "NXP LPC17xx/LPC40xx"
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select ARCH_HAVE_MPU
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select ARM_HAVE_MPU_UNIFIED
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select ARCH_HAVE_FETCHADD
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select ARMV7M_HAVE_STACKCHECK
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---help---
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NXP LPC17xx & LPC40xx architectures (ARM Cortex-M3/4)
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config ARCH_CHIP_LPC214X
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bool "NXP LPC214x"
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select ARCH_ARM7TDMI
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select ARCH_HAVE_LOWVECTORS
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---help---
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NXP LPC2145x architectures (ARM7TDMI)
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config ARCH_CHIP_LPC2378
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bool "NXP LPC2378"
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select ARCH_ARM7TDMI
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select ARCH_HAVE_LOWVECTORS
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---help---
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NXP LPC2145x architectures (ARM7TDMI)
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config ARCH_CHIP_LPC31XX
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bool "NXP LPC31XX"
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select ARCH_ARM926EJS
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select ARCH_HAVE_LOWVECTORS
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---help---
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NPX LPC31XX architectures (ARM926EJS).
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config ARCH_CHIP_LPC43XX
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bool "NXP LPC43XX"
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select ARCH_CORTEXM4
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select ARCH_HAVE_MPU
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select ARM_HAVE_MPU_UNIFIED
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select ARCH_HAVE_FPU
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select ARCH_HAVE_FETCHADD
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---help---
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NPX LPC43XX architectures (ARM Cortex-M4).
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config ARCH_CHIP_LPC54XX
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bool "NXP LPC54XX"
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select ARCH_CORTEXM4
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select ARCH_HAVE_MPU
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select ARM_HAVE_MPU_UNIFIED
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select ARCH_HAVE_FPU
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select ARCH_HAVE_FETCHADD
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---help---
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NPX LPC54XX architectures (ARM Cortex-M4).
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config ARCH_CHIP_MAX326XX
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bool "Maxim Integrated MAX326XX"
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select ARCH_HAVE_FETCHADD
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---help---
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Maxim Integrated MAX326XX microcontrollers (ARM Cortex-M4F).
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config ARCH_CHIP_MOXART
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bool "MoxART"
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select ARCH_ARM7TDMI
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select ARCH_HAVE_RESET
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select ARCH_HAVE_SERIAL_TERMIOS
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---help---
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MoxART family
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config ARCH_CHIP_NRF52
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bool "Nordic nRF52"
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select ARCH_CORTEXM4
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select ARCH_HAVE_TICKLESS
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select ARMV7M_HAVE_STACKCHECK
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#select ARCH_HAVE_MPU
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#select ARM_HAVE_MPU_UNIFIED
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select ARCH_HAVE_SPI_BITORDER
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select ARCH_HAVE_FPU
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select ARCH_HAVE_PWM_MULTICHAN
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select ARCH_HAVE_SERIAL_TERMIOS
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select ARCH_DMA_NO_FLASH_TRANSFER
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|
---help---
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Nordic nRF52 architectures (ARM Cortex-M4).
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config ARCH_CHIP_NRF53
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bool "Nordic nRF53"
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select ARCH_CORTEXM33
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select ARCH_HAVE_PWM_MULTICHAN
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select ARCH_DMA_NO_FLASH_TRANSFER
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depends on EXPERIMENTAL
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---help---
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Nordic nRF53 architectures (ARM dual Cortex-M33).
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config ARCH_CHIP_NRF91
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bool "Nordic nRF91"
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select ARCH_CORTEXM33
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select ARCH_HAVE_PWM_MULTICHAN
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select ARCH_HAVE_TRUSTZONE
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select ARCH_HAVE_TICKLESS
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select ARCH_DMA_NO_FLASH_TRANSFER
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select ARCH_HAVE_FPU
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depends on EXPERIMENTAL
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|
---help---
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Nordic nRF91 architectures (ARM Cortex-M33 with integrated
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LTE-M/NB-IoT modem and GNSS).
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|
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config ARCH_CHIP_NUC1XX
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bool "Nuvoton NUC100/120"
|
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select ARCH_CORTEXM0
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---help---
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|
Nuvoton NUC100/120 architectures (ARM Cortex-M0).
|
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|
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config ARCH_CHIP_MCX_NXXX
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bool "NXP MCX NXXx Cortex-M33"
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|
select ARCH_CORTEXM33
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select ARCH_HAVE_FPU
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select ARCH_HAVE_DFPU
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|
---help---
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NXXx architectures (Cortex-M33)
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|
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config ARCH_CHIP_RA4
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bool "Renesas RA4"
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---help---
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|
Renesas RA4 Architecture (ARM Cortex-M4F/M33).
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|
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config ARCH_CHIP_RP2040
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bool "Raspberry Pi RP2040"
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select ARCH_CORTEXM0
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select ARCH_HAVE_RAMVECTORS
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select ARCH_HAVE_MULTICPU
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select ARCH_HAVE_I2CRESET
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select ARM_HAVE_WFE_SEV
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select ARCH_HAVE_PWM_MULTICHAN
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select ARCH_BOARD_COMMON
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select ARCH_HAVE_CUSTOM_TESTSET
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|
---help---
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|
Raspberry Pi RP2040 architectures (ARM dual Cortex-M0+).
|
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|
|
config ARCH_CHIP_RP23XX
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bool "Raspberry Pi RP23XX"
|
|
select ARCH_CORTEXM33
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select ARCH_HAVE_RAMVECTORS
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select ARCH_HAVE_MULTICPU
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select ARCH_HAVE_I2CRESET
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select ARM_HAVE_WFE_SEV
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select ARM_HAVE_DSP
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select ARCH_HAVE_FPU
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select ARCH_HAVE_CUSTOM_TESTSET
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select ARCH_HAVE_PWM_MULTICHAN
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select ARCH_BOARD_COMMON
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|
---help---
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|
Raspberry Pi RP23XX architectures (ARM dual Cortex-M33 or RISC-V).
|
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|
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config ARCH_CHIP_S32K1XX
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bool "NXP S32K1XX"
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select ARCH_HAVE_MPU
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select ARM_HAVE_MPU_UNIFIED
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select ARCH_HAVE_RAMFUNCS
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select ARCH_HAVE_I2CRESET
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|
---help---
|
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NPX S32K1XX architectures (ARM Cortex-M0+ and Cortex-M4F).
|
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|
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config ARCH_CHIP_S32K3XX
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bool "NXP S32K3XX"
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select ARCH_HAVE_MPU
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select ARCH_HAVE_RAMFUNCS
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select ARM_HAVE_MPU_UNIFIED
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select ARCH_HAVE_I2CRESET
|
|
---help---
|
|
NPX S32K3XX architectures (ARM Cortex-M7).
|
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|
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config ARCH_CHIP_SAMA5
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bool "Atmel SAMA5"
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select ARCH_CORTEXA5
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select ARCH_HAVE_IRQPRIO
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select ARCH_HAVE_LOWVECTORS
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select ARCH_HAVE_FETCHADD
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select ARCH_HAVE_I2CRESET
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select ARCH_HAVE_TICKLESS
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select ARCH_HAVE_ADDRENV
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select ARCH_NEED_ADDRENV_MAPPING
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|
---help---
|
|
Atmel SAMA5 (ARM Cortex-A5)
|
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|
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config ARCH_CHIP_SAMD2X
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bool "Microchip/Atmel SAMD2x"
|
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select ARCH_CORTEXM0
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---help---
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Microchip (formerly Atmel) SAMD2X (ARM Cortex-M0+)
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|
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config ARCH_CHIP_SAML2X
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bool "Microchip/Atmel SAML2x"
|
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select ARCH_CORTEXM0
|
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---help---
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Microchip (formerly Atmel) SAML2X (ARM Cortex-M0+)
|
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|
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config ARCH_CHIP_SAMD5X
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bool "Microchip SAMD5x"
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|
select ARCH_CORTEXM4
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|
select ARCH_HAVE_TICKLESS
|
|
---help---
|
|
Microchip SAMD5X (ARM Cortex-M4)
|
|
|
|
config ARCH_CHIP_SAME5X
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bool "Microchip SAME5x"
|
|
select ARCH_CORTEXM4
|
|
---help---
|
|
Microchip SAME5x (ARM Cortex-M4)
|
|
|
|
config ARCH_CHIP_SAM34
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|
bool "Atmel SAM3/SAM4"
|
|
select ARCH_HAVE_MPU
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_RAMFUNCS
|
|
select ARMV7M_HAVE_STACKCHECK
|
|
---help---
|
|
Atmel SAM3 (ARM Cortex-M3) and SAM4 (ARM Cortex-M4) architectures
|
|
|
|
config ARCH_CHIP_SAMV7
|
|
bool "Atmel SAMV7"
|
|
select ARCH_CORTEXM7
|
|
select ARCH_HAVE_MPU
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_PROGMEM
|
|
select ARCH_HAVE_RAMFUNCS
|
|
select ARCH_HAVE_TICKLESS
|
|
select ARCH_HAVE_I2CRESET
|
|
select ARCH_HAVE_SPI_CS_CONTROL
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV7M_HAVE_STACKCHECK
|
|
select ARCH_HAVE_ADJTIME
|
|
---help---
|
|
Atmel SAMV7 (ARM Cortex-M7) architectures
|
|
|
|
config ARCH_CHIP_SIMPLELINK
|
|
bool "TI SimpleLink"
|
|
select ARCH_HAVE_MPU
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARCH_HAVE_FETCHADD
|
|
depends on EXPERIMENTAL
|
|
---help---
|
|
TI SimpleLink CCxxx architectures (ARM Cortex-M3 or M4)
|
|
|
|
config ARCH_CHIP_STM32
|
|
bool "STMicro STM32 F1/F2/F3/F4/G4/L1"
|
|
select ARCH_HAVE_MPU
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_I2CRESET
|
|
select ARCH_HAVE_HEAPCHECK
|
|
select ARCH_HAVE_PROGMEM
|
|
select ARCH_HAVE_SPI_BITORDER
|
|
select ARCH_HAVE_TICKLESS
|
|
select ARCH_HAVE_TIMEKEEPING
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV7M_HAVE_STACKCHECK
|
|
select ARCH_HAVE_ADJTIME
|
|
---help---
|
|
STMicro STM32 architectures (ARM Cortex-M3/4).
|
|
|
|
config ARCH_CHIP_STM32F0
|
|
bool "STMicro STM32 F0"
|
|
select ARCH_CORTEXM0
|
|
---help---
|
|
STMicro STM32F0 architectures (ARM Cortex-M0).
|
|
|
|
config ARCH_CHIP_STM32L0
|
|
bool "STMicro STM32 L0"
|
|
select ARCH_CORTEXM0
|
|
---help---
|
|
STMicro STM32L0 architectures (ARM Cortex-M0+).
|
|
|
|
config ARCH_CHIP_STM32G0
|
|
bool "STMicro STM32 G0"
|
|
select ARCH_CORTEXM0
|
|
select ARCH_HAVE_PROGMEM
|
|
---help---
|
|
STMicro STM32G0 architectures (ARM Cortex-M0+).
|
|
|
|
config ARCH_CHIP_STM32C0
|
|
bool "STMicro STM32 C0"
|
|
select ARCH_CORTEXM0
|
|
---help---
|
|
STMicro STM32C0 architectures (ARM Cortex-M0+).
|
|
|
|
config ARCH_CHIP_STM32F7
|
|
bool "STMicro STM32 F7"
|
|
select ARCH_CORTEXM7
|
|
select ARCH_HAVE_MPU
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_I2CRESET
|
|
select ARCH_HAVE_HEAPCHECK
|
|
select ARCH_HAVE_PROGMEM
|
|
select ARCH_HAVE_SPI_BITORDER
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV7M_HAVE_STACKCHECK
|
|
select ARCH_HAVE_TICKLESS
|
|
select ARCH_HAVE_TIMEKEEPING
|
|
---help---
|
|
STMicro STM32 architectures (ARM Cortex-M7).
|
|
|
|
config ARCH_CHIP_STM32H7
|
|
bool "STMicro STM32 H7"
|
|
select ARCH_HAVE_MPU
|
|
select ARCH_HAVE_I2CRESET
|
|
select ARCH_HAVE_PROGMEM
|
|
select ARCH_HAVE_SPI_BITORDER
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV7M_HAVE_STACKCHECK
|
|
select ARCH_HAVE_TICKLESS
|
|
select ARCH_HAVE_TIMEKEEPING
|
|
---help---
|
|
STMicro STM32H7 architectures (ARM Cortex-M7 or
|
|
dual ARM Cortex-M7 Cortex-M4).
|
|
|
|
config ARCH_CHIP_STM32L4
|
|
bool "STMicro STM32 L4"
|
|
select ARCH_CORTEXM4
|
|
select ARCH_HAVE_MPU
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_I2CRESET
|
|
select ARCH_HAVE_HEAPCHECK
|
|
select ARCH_HAVE_PROGMEM
|
|
select ARCH_HAVE_SPI_BITORDER
|
|
select ARCH_HAVE_TICKLESS
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV7M_HAVE_STACKCHECK
|
|
---help---
|
|
STMicro STM32 architectures (ARM Cortex-M4).
|
|
|
|
config ARCH_CHIP_STM32H5
|
|
bool "STMicro STM32 H5"
|
|
select ARCH_CORTEXM33
|
|
select ARCH_HAVE_MPU
|
|
select ARM_HAVE_DSP
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_HEAPCHECK
|
|
select ARCH_HAVE_PROGMEM
|
|
select ARCH_HAVE_SPI_BITORDER
|
|
select ARCH_HAVE_TICKLESS
|
|
select ARCH_HAVE_TRUSTZONE
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV8M_HAVE_STACKCHECK
|
|
---help---
|
|
STMicro STM32 H5 architectures (ARM Cortex-M33).
|
|
|
|
config ARCH_CHIP_STM32L5
|
|
bool "STMicro STM32 L5"
|
|
select ARCH_CORTEXM33
|
|
select ARCH_HAVE_MPU
|
|
select ARM_HAVE_DSP
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_HEAPCHECK
|
|
select ARCH_HAVE_PROGMEM
|
|
select ARCH_HAVE_SPI_BITORDER
|
|
select ARCH_HAVE_TICKLESS
|
|
select ARCH_HAVE_TRUSTZONE
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV8M_HAVE_STACKCHECK
|
|
---help---
|
|
STMicro STM32 L5 architectures (ARM Cortex-M33).
|
|
|
|
config ARCH_CHIP_STM32U5
|
|
bool "STMicro STM32 U5"
|
|
select ARCH_CORTEXM33
|
|
select ARCH_HAVE_MPU
|
|
select ARM_HAVE_DSP
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_HEAPCHECK
|
|
select ARCH_HAVE_HEAP2
|
|
select ARCH_HAVE_PROGMEM
|
|
select ARCH_HAVE_SPI_BITORDER
|
|
select ARCH_HAVE_TICKLESS
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV8M_HAVE_STACKCHECK
|
|
select ARCH_HAVE_TRUSTZONE
|
|
---help---
|
|
STMicro STM32 U5 architectures (ARM Cortex-M33).
|
|
|
|
config ARCH_CHIP_STM32WB
|
|
bool "STMicro STM32 WB"
|
|
select ARCH_CORTEXM4
|
|
select ARCH_HAVE_FPU
|
|
select ARCH_HAVE_MPU
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_I2CRESET
|
|
select ARCH_HAVE_HEAPCHECK
|
|
select ARCH_HAVE_PROGMEM
|
|
select ARCH_HAVE_SPI_BITORDER
|
|
select ARCH_HAVE_TICKLESS
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV7M_HAVE_STACKCHECK
|
|
---help---
|
|
STMicro STM32WB architectures (ARM Cortex-M4).
|
|
|
|
config ARCH_CHIP_STM32WL5
|
|
bool "STMicro STM32 WL5"
|
|
select ARCH_CORTEXM4
|
|
select ARCH_HAVE_MPU
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_I2CRESET
|
|
select ARCH_HAVE_HEAPCHECK
|
|
select ARCH_HAVE_PROGMEM
|
|
select ARCH_HAVE_SPI_BITORDER
|
|
select ARCH_HAVE_TICKLESS
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV7M_HAVE_STACKCHECK
|
|
---help---
|
|
STMicro STM32WL5 architectures (dual CPU ARM Cortex-M4 Cortex-M0).
|
|
|
|
config ARCH_CHIP_STR71X
|
|
bool "STMicro STR71x"
|
|
select ARCH_ARM7TDMI
|
|
select ARCH_HAVE_LOWVECTORS
|
|
---help---
|
|
STMicro STR71x architectures (ARM7TDMI).
|
|
|
|
config ARCH_CHIP_TMS570
|
|
bool "TI TMS570"
|
|
select ENDIAN_BIG
|
|
select ARCH_HAVE_LOWVECTORS
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_RAMFUNCS
|
|
select ARMV7R_MEMINIT
|
|
select ARMV7R_HAVE_DECODEFIQ
|
|
---help---
|
|
TI TMS570 family
|
|
|
|
config ARCH_CHIP_TIVA
|
|
bool "TI Tiva"
|
|
select ARCH_HAVE_MPU
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARCH_HAVE_FETCHADD
|
|
---help---
|
|
TI Tiva TM4C architectures (ARM Cortex-M4)
|
|
|
|
config ARCH_CHIP_XMC4
|
|
bool "Infineon XMC4xxx"
|
|
select ARCH_CORTEXM4
|
|
select ARCH_HAVE_MPU
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_RAMFUNCS
|
|
select ARCH_HAVE_I2CRESET
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV7M_HAVE_STACKCHECK
|
|
select ARCH_HAVE_TICKLESS
|
|
---help---
|
|
Infineon XMC4xxx(ARM Cortex-M4) architectures
|
|
|
|
config ARCH_CHIP_MX8MP
|
|
bool "NXP i.MX8MP"
|
|
select ARCH_CORTEXM7
|
|
select ARCH_HAVE_MPU
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_RAMFUNCS
|
|
select ARCH_HAVE_I2CRESET
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV7M_HAVE_ICACHE
|
|
select ARMV7M_HAVE_DCACHE
|
|
select ARMV7M_HAVE_ITCM
|
|
select ARMV7M_HAVE_DTCM
|
|
select ARMV7M_HAVE_STACKCHECK
|
|
---help---
|
|
NXP i.MX8MP (ARM Cortex-M7) architectures
|
|
|
|
config ARCH_CHIP_CXD56XX
|
|
bool "Sony CXD56xx"
|
|
select ARCH_CORTEXM4
|
|
select ARCH_HAVE_MPU
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARCH_HAVE_FPU
|
|
select ARCH_HAVE_HEAPCHECK
|
|
select ARCH_HAVE_MULTICPU
|
|
select ARCH_HAVE_TEXT_HEAP
|
|
select ARCH_HAVE_SDIO if MMCSD
|
|
select ARCH_HAVE_MATH_H
|
|
select ARCH_HAVE_I2CRESET
|
|
select ARCH_HAVE_CUSTOM_TESTSET
|
|
select LIBC_ARCH_ATOMIC if SMP
|
|
---help---
|
|
Sony CXD56XX (ARM Cortex-M4) architectures
|
|
|
|
config ARCH_CHIP_PHY62XX
|
|
bool "Phyplus PHY62XX BLE"
|
|
select ARCH_CORTEXM0
|
|
---help---
|
|
Phyplus PHY62XX architectures (ARM Cortex-M0).
|
|
|
|
config ARCH_CHIP_TLSR82
|
|
bool "Telink TLSR82XX"
|
|
select ARCH_ARMV6M
|
|
select ARCH_HAVE_RESET
|
|
---help---
|
|
Telink tlsr82xx architectures (Customed armv6m)
|
|
|
|
config ARCH_CHIP_MPS
|
|
bool "MPS ARM Series"
|
|
---help---
|
|
MPS platform (MPS2 MPS3)
|
|
|
|
config ARCH_CHIP_QEMU_ARM
|
|
bool "QEMU virt platform (ARMv7a)"
|
|
select ARCH_HAVE_POWEROFF
|
|
select ARCH_HAVE_RESET
|
|
select ARCH_IDLE_CUSTOM
|
|
---help---
|
|
QEMU virt platform (ARMv7a)
|
|
|
|
config ARCH_CHIP_GOLDFISH_ARM
|
|
bool "GOLDFISH virt platform (ARMv7a)"
|
|
select ARCH_HAVE_POWEROFF
|
|
select ARCH_HAVE_RESET
|
|
select ARM_HAVE_PSCI
|
|
select ARM_HAVE_NEON
|
|
---help---
|
|
GOLDFISH virt platform (ARMv7a)
|
|
|
|
config ARCH_CHIP_AT32
|
|
bool "Artery AT32 F4"
|
|
select ARCH_HAVE_MPU
|
|
select ARCH_HAVE_FETCHADD
|
|
select ARCH_HAVE_I2CRESET
|
|
select ARCH_HAVE_HEAPCHECK
|
|
select ARCH_HAVE_PROGMEM
|
|
select ARCH_HAVE_SPI_BITORDER
|
|
select ARCH_HAVE_TICKLESS
|
|
select ARCH_HAVE_TIMEKEEPING
|
|
select ARM_HAVE_MPU_UNIFIED
|
|
select ARMV7M_HAVE_STACKCHECK
|
|
---help---
|
|
Artery AT32 architectures (ARM Cortex-M4)
|
|
|
|
config ARCH_CHIP_CXD32XX
|
|
bool "Sony CXD32xx"
|
|
select ARCH_CORTEXM4
|
|
select ARCH_HAVE_FPU
|
|
select LIBC_ARCH_ATOMIC
|
|
---help---
|
|
Sony CXD32XX (ARM Cortex-M4) architectures
|
|
|
|
endchoice # ARM MCU selection
|
|
|
|
config ARCH_CHIP
|
|
string
|
|
default "a1x" if ARCH_CHIP_A1X
|
|
default "am335x" if ARCH_CHIP_AM335X
|
|
default "fvp-v8r-aarch32" if ARCH_CHIP_FVP_ARMV8R_AARCH32
|
|
default "c5471" if ARCH_CHIP_C5471
|
|
default "dm320" if ARCH_CHIP_DM320
|
|
default "efm32" if ARCH_CHIP_EFM32
|
|
default "eoss3" if ARCH_CHIP_EOSS3
|
|
default "gd32f4" if ARCH_CHIP_GD32F4
|
|
default "imx1" if ARCH_CHIP_IMX1
|
|
default "imx6" if ARCH_CHIP_IMX6
|
|
default "imx9" if ARCH_CHIP_IMX9_CORTEX_M
|
|
default "imxrt" if ARCH_CHIP_IMXRT
|
|
default "kinetis" if ARCH_CHIP_KINETIS
|
|
default "kl" if ARCH_CHIP_KL
|
|
default "lc823450" if ARCH_CHIP_LC823450
|
|
default "tiva" if ARCH_CHIP_LM || ARCH_CHIP_TIVA || ARCH_CHIP_SIMPLELINK
|
|
default "lpc17xx_40xx" if ARCH_CHIP_LPC17XX_40XX
|
|
default "lpc214x" if ARCH_CHIP_LPC214X
|
|
default "lpc2378" if ARCH_CHIP_LPC2378
|
|
default "lpc31xx" if ARCH_CHIP_LPC31XX
|
|
default "lpc43xx" if ARCH_CHIP_LPC43XX
|
|
default "lpc54xx" if ARCH_CHIP_LPC54XX
|
|
default "max326xx" if ARCH_CHIP_MAX326XX
|
|
default "moxart" if ARCH_CHIP_MOXART
|
|
default "nrf52" if ARCH_CHIP_NRF52
|
|
default "nrf53" if ARCH_CHIP_NRF53
|
|
default "nrf91" if ARCH_CHIP_NRF91
|
|
default "nuc1xx" if ARCH_CHIP_NUC1XX
|
|
default "ra4" if ARCH_CHIP_RA4
|
|
default "rp2040" if ARCH_CHIP_RP2040
|
|
default "rp23xx" if ARCH_CHIP_RP23XX
|
|
default "s32k1xx" if ARCH_CHIP_S32K1XX
|
|
default "s32k3xx" if ARCH_CHIP_S32K3XX
|
|
default "sama5" if ARCH_CHIP_SAMA5
|
|
default "samd2l2" if ARCH_CHIP_SAMD2X || ARCH_CHIP_SAML2X
|
|
default "samd5e5" if ARCH_CHIP_SAMD5X || ARCH_CHIP_SAME5X
|
|
default "sam34" if ARCH_CHIP_SAM34
|
|
default "samv7" if ARCH_CHIP_SAMV7
|
|
default "stm32" if ARCH_CHIP_STM32
|
|
default "stm32f0l0g0" if ARCH_CHIP_STM32F0 || ARCH_CHIP_STM32L0 || ARCH_CHIP_STM32G0 || ARCH_CHIP_STM32C0
|
|
default "stm32f7" if ARCH_CHIP_STM32F7
|
|
default "stm32h7" if ARCH_CHIP_STM32H7
|
|
default "stm32l4" if ARCH_CHIP_STM32L4
|
|
default "stm32h5" if ARCH_CHIP_STM32H5
|
|
default "stm32l5" if ARCH_CHIP_STM32L5
|
|
default "stm32u5" if ARCH_CHIP_STM32U5
|
|
default "stm32wb" if ARCH_CHIP_STM32WB
|
|
default "stm32wl5" if ARCH_CHIP_STM32WL5
|
|
default "str71x" if ARCH_CHIP_STR71X
|
|
default "tms570" if ARCH_CHIP_TMS570
|
|
default "xmc4" if ARCH_CHIP_XMC4
|
|
default "mx8mp" if ARCH_CHIP_MX8MP
|
|
default "cxd56xx" if ARCH_CHIP_CXD56XX
|
|
default "phy62xx" if ARCH_CHIP_PHY62XX
|
|
default "tlsr82" if ARCH_CHIP_TLSR82
|
|
default "qemu" if ARCH_CHIP_QEMU_ARM
|
|
default "mps" if ARCH_CHIP_MPS
|
|
default "goldfish" if ARCH_CHIP_GOLDFISH_ARM
|
|
default "at32" if ARCH_CHIP_AT32
|
|
default "cxd32xx" if ARCH_CHIP_CXD32XX
|
|
default "csk6" if ARCH_CHIP_CSK6
|
|
default "mcx-nxxx" if ARCH_CHIP_MCX_NXXX
|
|
|
|
if ARCH_CHIP_A1X
|
|
source "soc/arm/a1x/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_AM335X
|
|
source "soc/arm/am335x/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_FVP_ARMV8R_AARCH32
|
|
source "soc/arm/fvp-v8r-aarch32/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_C5471
|
|
source "soc/arm/c5471/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_DM320
|
|
source "soc/arm/dm320/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_EFM32
|
|
source "soc/arm/efm32/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_EOSS3
|
|
source "soc/arm/eoss3/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_GD32F4
|
|
source "soc/arm/gd32f4/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_IMX1
|
|
source "soc/arm/imx1/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_IMX6
|
|
source "soc/arm/imx6/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_IMX9_CORTEX_M
|
|
source "soc/arm/imx9/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_IMXRT
|
|
source "soc/arm/imxrt/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_KINETIS
|
|
source "soc/arm/kinetis/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_KL
|
|
source "soc/arm/kl/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_LC823450
|
|
source "soc/arm/lc823450/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_LM || ARCH_CHIP_TIVA || ARCH_CHIP_SIMPLELINK
|
|
source "soc/arm/tiva/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_LPC17XX_40XX
|
|
source "soc/arm/lpc17xx_40xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_LPC214X
|
|
source "soc/arm/lpc214x/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_LPC2378
|
|
source "soc/arm/lpc2378/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_LPC31XX
|
|
source "soc/arm/lpc31xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_LPC43XX
|
|
source "soc/arm/lpc43xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_LPC54XX
|
|
source "soc/arm/lpc54xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_S32K1XX
|
|
source "soc/arm/s32k1xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_S32K3XX
|
|
source "soc/arm/s32k3xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_MAX326XX
|
|
source "soc/arm/max326xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_MOXART
|
|
source "soc/arm/moxart/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_NRF52
|
|
source "soc/arm/nrf52/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_NRF53
|
|
source "soc/arm/nrf53/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_NRF91
|
|
source "soc/arm/nrf91/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_NUC1XX
|
|
source "soc/arm/nuc1xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_RA4
|
|
source "soc/arm/ra4/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_RP2040
|
|
source "soc/arm/rp2040/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_RP23XX
|
|
source "soc/arm/rp23xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_SAMA5
|
|
source "soc/arm/sama5/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_SAMD2X || ARCH_CHIP_SAML2X
|
|
source "soc/arm/samd2l2/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_SAMD5X || ARCH_CHIP_SAME5X
|
|
source "soc/arm/samd5e5/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_SAM34
|
|
source "soc/arm/sam34/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_SAMV7
|
|
source "soc/arm/samv7/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_STM32
|
|
source "soc/arm/stm32/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_STM32F0 || ARCH_CHIP_STM32L0 || ARCH_CHIP_STM32G0 || ARCH_CHIP_STM32C0
|
|
source "soc/arm/stm32f0l0g0/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_STM32F7
|
|
source "soc/arm/stm32f7/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_STM32H7
|
|
source "soc/arm/stm32h7/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_STM32L4
|
|
source "soc/arm/stm32l4/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_STM32H5
|
|
source "soc/arm/stm32h5/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_STM32L5
|
|
source "soc/arm/stm32l5/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_STM32U5
|
|
source "soc/arm/stm32u5/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_STM32WB
|
|
source "soc/arm/stm32wb/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_STM32WL5
|
|
source "soc/arm/stm32wl5/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_STR71X
|
|
source "soc/arm/str71x/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_TMS570
|
|
source "soc/arm/tms570/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_XMC4
|
|
source "soc/arm/xmc4/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_MX8MP
|
|
source "soc/arm/mx8mp/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_PHY62XX
|
|
source "soc/arm/phy62xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_CXD56XX
|
|
source "soc/arm/cxd56xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_TLSR82
|
|
source "soc/arm/tlsr82/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_QEMU_ARM
|
|
source "soc/arm/qemu/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_MPS
|
|
source "soc/arm/mps/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_GOLDFISH_ARM
|
|
source "soc/arm/goldfish/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_AT32
|
|
source "soc/arm/at32/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_CXD32XX
|
|
source "soc/arm/cxd32xx/Kconfig"
|
|
endif
|
|
if ARCH_CHIP_MCX_NXXX
|
|
source "soc/arm/mcx-nxxx/Kconfig"
|
|
endif |