107 lines
5 KiB
C
107 lines
5 KiB
C
/****************************************************************************
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* arch/arm/src/sam34/hardware/sam4l_picouart.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAM34_HARDWARE_SAM4L_PICOUART_H
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#define __ARCH_ARM_SRC_SAM34_HARDWARE_SAM4L_PICOUART_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include "hardware/sam_memorymap.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* PICOUART register offsets ************************************************/
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#define SAM_PICOUART_CR_OFFSET 0x0000 /* Control Register */
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#define SAM_PICOUART_CFG_OFFSET 0x0004 /* Configuration Register */
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#define SAM_PICOUART_SR_OFFSET 0x0008 /* Status Register */
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#define SAM_PICOUART_RHR_OFFSET 0x000c /* Receive Holding Register */
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#define SAM_PICOUART_VERSION_OFFSET 0x0020 /* Version Register */
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/* PICOUART register addresses **********************************************/
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#define SAM_PICOUART_CR_OFFSET 0x0000 /* Control Register */
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#define SAM_PICOUART_CR_OFFSET 0x0000 /* Control Register */
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#define SAM_PICOUART_CFG_OFFSET 0x0004 /* Configuration Register */
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#define SAM_PICOUART_CFG_OFFSET 0x0004 /* Configuration Register */
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#define SAM_PICOUART_SR_OFFSET 0x0008 /* Status Register */
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#define SAM_PICOUART_SR_OFFSET 0x0008 /* Status Register */
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#define SAM_PICOUART_RHR_OFFSET 0x000c /* Receive Holding Register */
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#define SAM_PICOUART_RHR_OFFSET 0x000c /* Receive Holding Register */
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#define SAM_PICOUART_VERSION_OFFSET 0x0020 /* Version Register */
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#define SAM_PICOUART_VERSION_OFFSET 0x0020 /* Version Register */
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/* PICOUART register bit definitions ****************************************/
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/* Control Register */
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#define PICOUART_CR_EN (1 << 0) /* Bit 0: Enable */
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#define PICOUART_CR_DIS (1 << 1) /* Bit 1: Disable */
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/* Configuration Register */
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#define PICOUART_CFG_SOURCE_SHIFT (0) /* Bit 0-1: Source Enable Mode */
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#define PICOUART_CFG_SOURCE_MASK (3 << PICOUART_CFG_SOURCE_SHIFT)
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# define PICOUART_CFG_SOURCE_WE (0 << PICOUART_CFG_SOURCE_SHIFT) /* Wake up and event disable */
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# define PICOUART_CFG_SOURCE_WESB (1 << PICOUART_CFG_SOURCE_SHIFT) /* Wake up or event enable on start bit detection */
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# define PICOUART_CFG_SOURCE_WEFF (2 << PICOUART_CFG_SOURCE_SHIFT) /* Wake up or event enable on full frame reception */
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# define PICOUART_CFG_SOURCE_WECH (3 << PICOUART_CFG_SOURCE_SHIFT) /* Wake up or event enable on character recognition */
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#define PICOUART_CFG_ACTION (1 << 0) /* Bit 0: Action to perform */
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#define PICOUART_CFG_MATCH_SHIFT (8) /* Bit 8-15: Data Match */
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#define PICOUART_CFG_MATCH_SHIFT (8) /* Bit 8-15: Data Match */
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#define PICOUART_CFG_MATCH_MASK (0xff << PICOUART_CFG_MATCH_SHIFT)
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/* Status Register */
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#define PICOUART_SR_EN (1 << 0) /* Bit 0: Enable Status */
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#define PICOUART_SR_DRDY (1 << 1) /* Bit 1: Data Ready */
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/* Receive Holding Register */
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#define PICOUART_RHR_MASK 0xff
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/* Version Register */
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#define PICOUART_VERSION_SHIFT (0) /* Bits 0-11: Macrocell version number */
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#define PICOUART_VERSION_MASK (0xfff << PICOUART_VERSION_SHIFT)
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#define PICOUART_VARIANT_SHIFT (16) /* Bits 16-18: Reserved */
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#define PICOUART_VARIANT_MASK (7 << PICOUART_VARIANT_SHIFT)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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#endif /* __ARCH_ARM_SRC_SAM34_HARDWARE_SAM4L_PICOUART_H */
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