5865d2a8ff
Add esp_spiram_writeback_range function to flush some areas of spiram cache Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
50 lines
2.4 KiB
Text
50 lines
2.4 KiB
Text
/****************************************************************************
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* boards/xtensa/esp32s2/common/scripts/esp32s2_aliases.ld
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#include <nuttx/config.h>
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/* Lower-case aliases for symbols not compliant to nxstyle */
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PROVIDE( cache_allocate_sram = Cache_Allocate_SRAM );
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PROVIDE( cache_invalidate_icache_all = Cache_Invalidate_ICache_All );
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PROVIDE( cache_resume_dcache = Cache_Resume_DCache );
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PROVIDE( cache_resume_icache = Cache_Resume_ICache );
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PROVIDE( cache_resume_icache = Cache_Resume_ICache );
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PROVIDE( cache_set_icache_mode = Cache_Set_ICache_Mode );
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PROVIDE( cache_suspend_dcache = Cache_Suspend_DCache );
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PROVIDE( cache_suspend_icache = Cache_Suspend_ICache );
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PROVIDE( rom_i2c_readreg = rom_i2c_readReg );
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PROVIDE( rom_i2c_readreg_mask = rom_i2c_readReg_Mask );
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PROVIDE( rom_i2c_writereg = rom_i2c_writeReg );
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PROVIDE( rom_i2c_writereg_mask = rom_i2c_writeReg_Mask );
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PROVIDE( cache_dbus_mmu_set = Cache_Dbus_MMU_Set );
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PROVIDE( cache_ibus_mmu_set = Cache_Ibus_MMU_Set );
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PROVIDE( cache_invalidate_addr = Cache_Invalidate_Addr );
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PROVIDE( cache_invalidate_dcache_all = Cache_Invalidate_DCache_All );
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PROVIDE( cache_occupy_addr = Cache_Occupy_Addr );
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PROVIDE( cache_set_idrom_mmu_info = Cache_Set_IDROM_MMU_Info );
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PROVIDE( cache_set_idrom_mmu_size = Cache_Set_IDROM_MMU_Size );
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PROVIDE( cache_writeback_all = Cache_WriteBack_All );
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PROVIDE( cache_writeback_items = Cache_WriteBack_Items );
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PROVIDE( cache_writeback_addr = Cache_WriteBack_Addr );
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PROVIDE( cache_set_dcache_mode = Cache_Set_DCache_Mode );
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PROVIDE( cache_enable_dcache = Cache_Enable_DCache );
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