arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c: Follow the procedure listed in the LPC176x/5x User Manual when reading from and writing to the PHY's registers (section 10.11.14). I couldn't see any behavioral change after this commit, but nonetheless is a good practice to follow the manufacturer's recommended procedure.
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1 changed files with 3 additions and 1 deletions
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@ -2317,6 +2317,8 @@ static void lpc17_40_phywrite(uint8_t phyaddr, uint8_t regaddr, uint16_t phydata
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{
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uint32_t regval;
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lpc17_40_putreg(0, LPC17_40_ETH_MCMD);
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/* Set PHY address and PHY register address */
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regval = ((uint32_t)phyaddr << ETH_MADR_PHYADDR_SHIFT) |
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@ -2359,7 +2361,7 @@ static uint16_t lpc17_40_phyread(uint8_t phyaddr, uint8_t regaddr)
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{
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uint32_t regval;
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lpc17_40_putreg(0, LPC17_40_ETH_MCMD);
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lpc17_40_putreg(1, LPC17_40_ETH_MCMD);
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/* Set PHY address and PHY register address */
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