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esp32s3/irq: Enhance IRQ subsystem

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- Fix macro values from `arch/xtensa/include/esp32s3/irq.h`
- Remove references to unexisting edge-triggered CPU interrupts
- Add `esp32s3_getirq` to get IRQ based on core and the `cpuint`
This commit is contained in:
Tiago Medicci Serrano 2023-08-01 15:02:52 -03:00 • committed by Alan Carvalho de Assis
parent 31476bcb34
commit 6089f58f00
3 changed files with 62 additions and 27 deletions
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10
arch/xtensa/include/esp32s3/irq.h
View file

@ -438,15 +438,9 @@
#define ESP32S3_CPUINT_LEVELPERIPH_20 31
#define ESP32S3_CPUINT_NLEVELPERIPHS 21
#define ESP32S3_CPUINT_LEVELSET 0x8fbe333f
#define ESP32S3_CPUINT_LEVELSET 0xdffe373f
#define ESP32S3_CPUINT_EDGEPERIPH_0 10
#define ESP32S3_CPUINT_EDGEPERIPH_1 22
#define ESP32S3_CPUINT_EDGEPERIPH_2 28
#define ESP32S3_CPUINT_EDGEPERIPH_3 30
#define ESP32S3_CPUINT_NEDGEPERIPHS 4
#define ESP32S3_CPUINT_EDGESET 0x50400400
#define ESP32S3_CPUINT_NEDGEPERIPHS 0
#define ESP32S3_CPUINT_NNMIPERIPHS 1
#define ESP32S3_CPUINT_NMISET 0x00004000

61
arch/xtensa/src/esp32s3/esp32s3_irq.c
View file

@ -346,27 +346,14 @@ static int esp32s3_alloc_cpuint(int priority, int type)
DEBUGASSERT(priority >= ESP32S3_MIN_PRIORITY &&
priority <= ESP32S3_MAX_PRIORITY);
DEBUGASSERT(type == ESP32S3_CPUINT_LEVEL ||
type == ESP32S3_CPUINT_EDGE);
DEBUGASSERT(type == ESP32S3_CPUINT_LEVEL);
if (type == ESP32S3_CPUINT_LEVEL)
{
/* Check if there are any level CPU interrupts available at the
* requested interrupt priority.
*/
/* Check if there are any level CPU interrupts available at the
* requested interrupt priority.
*/
mask = g_priority[ESP32S3_PRIO_INDEX(priority)] &
ESP32S3_CPUINT_LEVELSET;
}
else
{
/* Check if there are any edge CPU interrupts available at the
* requested interrupt priority.
*/
mask = g_priority[ESP32S3_PRIO_INDEX(priority)] &
ESP32S3_CPUINT_EDGESET;
}
mask = g_priority[ESP32S3_PRIO_INDEX(priority)] &
ESP32S3_CPUINT_LEVELSET;
return esp32s3_getcpuint(mask);
}
@ -834,6 +821,42 @@ void esp32s3_teardown_irq(int cpu, int periphid, int cpuint)
leave_critical_section(irqstate);
}
/****************************************************************************
* Name: esp32s3_getirq
*
* Description:
* This function returns the IRQ associated with a CPU interrupt
*
* Input Parameters:
* cpu - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
* cpuint - The CPU interrupt associated to the IRQ
*
* Returned Value:
* The IRQ associated with such CPU interrupt or CPUINT_UNASSIGNED if
* IRQ is not yet assigned to a CPU interrupt.
*
****************************************************************************/
int esp32s3_getirq(int cpu, int cpuint)
{
uint8_t *intmap;
#ifdef CONFIG_SMP
/* Select PRO or APP CPU interrupt mapping table */
if (cpu != 0)
{
intmap = g_cpu1_intmap;
}
else
#endif
{
intmap = g_cpu0_intmap;
}
return CPUINT_GETIRQ(intmap[cpuint]);
}
/****************************************************************************
* Name: xtensa_int_decode
*

18
arch/xtensa/src/esp32s3/esp32s3_irq.h
View file

@ -114,6 +114,24 @@ int esp32s3_setup_irq(int cpu, int periphid, int priority, int type);
void esp32s3_teardown_irq(int cpu, int periphid, int cpuint);
/****************************************************************************
* Name: esp32s3_getirq
*
* Description:
* This function returns the IRQ associated with a CPU interrupt
*
* Input Parameters:
* cpu - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
* cpuint - The CPU interrupt associated to the IRQ
*
* Returned Value:
* The IRQ associated with such CPU interrupt or CPUINT_UNASSIGNED if
* IRQ is not yet assigned to a CPU interrupt.
*
****************************************************************************/
int esp32s3_getirq(int cpu, int cpuint);
#undef EXTERN
#if defined(__cplusplus)
}