riscv_cpustart.c: Fix reading of interrupt status

Let's read the interrupt status correctly, by checking for the interrupt
source bit instead of assuming no other status bit is set.

arch/risc-v/src/common/riscv_cpustart.c

@@ -81,7 +81,7 @@ void riscv_cpu_boot(int cpu)
     {
       asm("WFI");
     }
-  while (READ_CSR(CSR_IP) != IP_SIP);
+  while (!(READ_CSR(CSR_IP) & IP_SIP));
 
 #ifdef CONFIG_RISCV_PERCPU_SCRATCH
   /* Initialize the per CPU areas */