This commit removes the termios dependency of the command to set fix
rate. It makes the MINMEA dependency present in the Kconfig options for
the driver, and it also adds a retry limit to the boot message
verification of 3 times. The documentation has been updated to reflect
the correct signature for the registration function and fix some
formatting.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
When using the ILI9342C LCD on the esp32s3-box-3 development board, the
displayed colors are inverted.
add content
Manually converts the byte order of color data from little-endian
to big-endian before transmission.
The current setlogmask call used in coredump_dump_syslog specifies a raw log level
instead of a bitmask, and this causes wrong evaluations later on when that value
is checked against a mask. Therefore the LOG_UPTO macro is added for conversion.
Signed-off-by: Niccolò Maggioni <nicco.maggioni+nuttx@gmail.com>
If atomic_try_cmpxchg_xxxx runs on LL/SC architectures (e.g.ARMv7,
ARMv8, RISC-V), the weak CAS expands to a single LDREX/STREX pair.
If the CPU takes an IRQ/FIQ/SVC between the two instructions,
hardware performs an implicit CLREX and the following STREX returns
1, therefore atomic_try_cmpxchg_xxxx return failure even though
*addr* still holds the expected value.
So let's retry atomic_try_cmpxchg_xxxx in this case.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Replaces CONFIG_I2C_DRIVER with CONFIG_I2C for proper build requirements.
Same for SPI. Also changes some logging to syslog.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
These sections can be emited by gcc in some cases for huge data blocks.
For example huge global static uninitialzied arrays can be placed in .lbss section
which can mess NuttX memory organization and cause hard to find bugs.
Unfortunately this is not well documented in GCC and all we have is this bug report:
https://sourceware.org/bugzilla/show_bug.cgi?id=22553
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
This commit adds SD card support to the WeAct STM32H743 board configuration.
The implementation enables the board to interface with SD cards through the
SDMMC peripheral, allowing file system operations and data storage capabilities.
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
1. Rotate the video screen 90 degrees right.
2. Enable touchscreen for the LVGL configuration "lckfb-szpi-esp32s3:lvgl" and add lvgldemo autostart.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Add touchscreen swap configuration for boards and enable it for defconfig that enables `FT5X06_SWAPXY`.
Refresh configurations to delete the deprecated `FT5X06_NPOLLWAITERS` and `FT5X06_SWAPXY`.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Add support for mirror/swap coordinates.
There are some touchscreen drivers not support mirror or swap coordinates.
For example, drivers/input/ft5x06 does not support mirror.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
This commit makes it clear how to use the refresh.sh script to
update board configs showing differents usages cenarios.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
The architecture defines maximum of 128 interrupts, whereas previous
code only supported 32 interrupts. For every 32 interrupts added,
there are three additional registers: INTERRUPT, INTCLEAR, and INTENABLE.
This patch adds support for handling these registers.
Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
GICD_ICFGR requires full 32-bit RMW operations.
Each interrupt uses 2 bits; thus updates must be synchronized
to avoid losing configuration in concurrent environments.
RMW conflict on GICD_ICFGRn (without lock)
CPU0 (set IRQ32 edge) CPU1 (set IRQ33 level)
--------------------- -----------------------
val0 = read(ICFGRn) │ val1 = read(ICFGRn)
│
val0 |= (edge << 4) │
│ val1 &= ~(3 << 6)
│
write(ICFGRn, val0) │
│ write(ICFGRn, val1)
=> IRQ32 config lost OR IRQ33 config lost
(depends on which write finishes last)
Concurrent RMW on ICFGRn causes lost config.
Protect with spinlock to avoid data race.
Since interrupt type configuration is infrequent,
a single global GIC lock is sufficient (no need for
fine-grained locking per ICFGR register).
Signed-off-by: Shen Cao <caoshen3@lixiang.com>
Previous code was failing to disable error interrupts which
due to standard CAN retransmissions might trigger continusouly
(for example, with a disconnected CAN interface) flooding the
system and preventing other operations to continue.
Fixes: https://github.com/apache/nuttx/issues/16668
Signed-off-by: Carlos Sanchez <carlossanchez@geotab.com>
A descriptor ring length must be aligned to 128, one descriptor is 16B length,
so we can provide this condition with the appropriate number of descriptors
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Descriptor head is managed by HW and should not be modified by SW unless:
1. device is after a reset
2. device is before enabling TX or RX
Also set correct tail for RX which should point at the end of ring
(descriptor ring is zero-indexed).
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Do not reset RX/TX rings when link status change.
This can break internal card state which is impossible to recovery.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
