occurring during compilation and linking phase when the configuration
(CONFIG_ESP32S3_APP_FORMAT_LEGACY=y) is enabled.
---
undefined reference to _esp_system_init_fn_array_start
undefined reference to _esp_system_init_fn_array_end
undefined reference to __init_array_start
undefined reference to __init_array_end
---
Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
Updates E-Fuse driver for ESP32, now sharing a common implementation across Xtensa devices.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Updates E-Fuse driver for ESP32S2, sharing a common implementation for Xtensa devices.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Updates E-Fuse driver for ESP32S3, now sharing a common implementation across
Xtensa devices.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Adds SYS_STARTUP_FN which calls constructors and init functions on
common source code. Requires compatibility changes on linker script.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Introduce EXT1 wakeup functionality to the ESP32-S3 power management
subsystem. With this feature, the ESP32-S3 can wake up from PM_STANDBY
or PM_SLEEP when one or more RTC GPIOs trigger the EXT1 condition.
Changes include:
- Added EXT1 wakeup configuration and preparation logic in rtc code.
- Integrated EXT1 handling in pmstandby() and pmsleep().
- New board-level Kconfig options under ESP32-S3 DevKit menu:
- CONFIG_PM_EXT1_WAKEUP: enable EXT1 wakeup support
- CONFIG_PM_EXT1_WAKEUP_RTC_GPIO<n>: select RTC GPIOs as wake sources
- CONFIG_PM_EXT1_WAKEUP_TRIGGER_MODE: choose wakeup on HIGH or LOW level
- Fixing Kconfig style
- Fixing comments standard
- Adding PM documentation for esp32s3-devkit
Impact:
- No build impact unless CONFIG_PM_EXT1_WAKEUP is enabled.
- When enabled, ESP32-S3 can wake from low-power states via RTC GPIOs.
- No new public API introduced; controlled via board Kconfig.
Tested on ESP32-S3 DevKit:
- Configured GPIO4 and GPIO5 as EXT1 wake sources.
- Verified wakeup from light sleep and deep sleep on external signals.
- Wakeup reason correctly reported as EXT1.
Signed-off-by: Thiago Finelon <thiago.sfinelon@gmail.com>
- Added esp32s3_board_spislavedev.c with board-level SPI slave logic
- Added esp32s3_board_spislavedev.h public header in common/include
- Updated Make.defs to include the new source when CONFIG_SPI_SLAVE_DRIVER=y
- Adding spislv board config to esp32s3-devkit
- Adding documentation of esp32s3 devkit spi slv
- Fixing path include in esp32s3_board_spislavedev.c
- Fixing relative path in the header of esp32s3_board_spislavedev.h
- Removing neasted check in Make.defs, consistency reasons
This provides initial support for SPI slave device initialization
on ESP32-S3 boards, making the feature available under conditional
build configuration.
Signed-off-by: Thiago Finelon <thiago.sfinelon@gmail.com>
Prior to this commit, it wasn't possible to load ELF modules from
the external PSRAM. There were two main issues about it: 1) copying
data using the instruction bus was being used instead of the data
bus (this, per si, isn't a problem, but requires special attention
regarding data alignment), and 2) the cache was not being properly
cleaned and flushed to properly access the loaded data using the
instruction bus.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
If both SPI Flash support (`CONFIG_ESP32S3_SPIFLASH`) and PSRAM
(`CONFIG_ESP32S3_SPIRAM`) are enabled, the PSRAM can only be
assigned to the user's heap (`CONFIG_ESP32S3_SPIRAM_USER_HEAP`).
Additionaly, `CONFIG_ESP32S3_SPI_FLASH_SUPPORT_PSRAM_STACK` must be
set because the system will end up allocating tasks' stacks from
the external PSRAM. This has an impact when dealing with SPI flash
operations because the cache must be disabled and the running task
should not rely on any data from the PSRAM. To accomplish that, It
offloads the SPI flash operation to a work queue (which, by
definition, allocates its heap from the kernel heap).
The same (assigning the PSRAM to the user's heap) is valid when the
Wi-Fi is enabled because the lower-half driver requires data being
allocated from the internal memory (which can only be achieved by
allocating from the kernel heap when both the kernel and user heaps
exists).
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit adds the missing `board_memorymap.h` file for all the
ESP32-S3's boards. This header file is necessary whenever Wi-Fi
is enabled, for instance.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
NVBLK provides a block device that operates on top of a non volatile
memory (as a mtd device) that enables wear levelling for non volatile
memory. It's operation is similar to the dhara wear levelling library,
but nvblk is meant to be used on smaller (nor, mram, rram) memory.
I am also the author and maintainer of the nvblk library.
A block device can be created during startup by using:
```
nvblk_initialize(0, mtd, CONFIG_MTD_NVBLK_DEFAULT_LBS,
CONFIG_MTD_NVBLK_DEFAULT_IOBS,
CONFIG_MTD_NVBLK_DEFAULT_SPEB);
```
and a fat filesystem on top of this as:
```
nsh> mkfatfs /dev/mtdblock0
nsh> mount -t vfat /dev/mtdblock0 /mnt
```
this fat filesystem can then be used:
```
nsh> echo "test" > /mnt/test.txt
nsh> cat test.txt
test
nsh>
```
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
This is a supplement to the patch:1936126210a56b6d1b033d6d940669413dd6e1b0
Due to the automatic wrapping of MTD devices during the
open() process, the legacy registration methods
ftl_initialize() and bchdev_register() are no longer
required for MTD device registration for user code.
So we have adjusted the registration method for MTD devices
in nuttx/boards, replacing the previous approach using
ftl_initialize() with register_mtddriver().
We have adjusted the registration method for MTD devices
in nuttx/boards, replacing the previous approach using
ftl_initialize() and bchdev_register() with
register_mtddriver().
When registering MTD devices via register_mtddriver(),
FTL and BCH wrappers will be added during the open() process:
1. Character Device Mode:
When accessing the MTD device node via the open() interface,
the device will be automatically converted to a character
device. Both FTL and BCH wrappers will be implicitly added,
provided that BCH support is enabled in the configuration.
2. Block Device Mode:
When accessing the MTD device node via open_blockdriver(),
the device will be treated as a block device, with only
the FTL wrapper automatically applied.
Due to the automatic wrapping of MTD devices during the
open() process, the legacy registration methods
ftl_initialize() and bchdev_register() are no longer
required for MTD device registration for user code and should
be used only internally within fs and driver code.
Signed-off-by: jingfei <jingfei@xiaomi.com>
When using the ILI9342C LCD on the esp32s3-box-3 development board, the
displayed colors are inverted.
add content
Manually converts the byte order of color data from little-endian
to big-endian before transmission.
1. Rotate the video screen 90 degrees right.
2. Enable touchscreen for the LVGL configuration "lckfb-szpi-esp32s3:lvgl" and add lvgldemo autostart.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Adds a defconfig for SDMMC over SPI to the following boards:
esp32-devkitc, esp32s2-saola-1 and esp32s3-devkit.
Renames the defconfig name for:
esp32-lyrat and esp32-wrover-kit.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Deletes board specific sdmmc implementation in favor of a common source and header file.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Initializing configuration for Fastboot TCP network device.
esp32s3-devkit:fastboot : Fastboot TCP and USB transport enabled
esp32s3-devkit:fastboot_usb : Fastboot USB transport enabled only
esp32s3-devkit:fastboot_tcp : Fastboot TCP transport enabled only
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Initializing configuration for Fastboot TCP network device.
lckfb-szpi-esp32s3:fastboot : Fastboot TCP and USB transport enabled
lckfb-szpi-esp32s3:fastboot_usb : Fastboot USB transport enabled only
lckfb-szpi-esp32s3:fastboot_tcp : Fastboot TCP transport enabled only
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
esp32 based boards will now be able to use GC9A01 LCD driver for LVGL.
- Enabling CONFIG_LCD_GC9A01 will now flip spi_cmddata pin
- Added esp32_gc9a01.c file.
Signed-off-by: Aung Khant Maw <aungkhantmaw64@gmail.com>
This enables the use of the cryptographic accelerator within
the ESP32. The support algorithms are: SHA1, SHA256, SHA384
and SHA512.
Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
Modify rtc_data_seg to rtc_slow_seg to fix RTC problems.
The proper location for those is in RTC slow memory.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
This change affects esp32s2-saola-1 board when optimizations are enabled.
Fixes issue on timer defconfig.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
This commit adds sections used by the debugger and disassembler to
get more information about raw data present in the code.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit sets the coexiram (from libcoexist.a) sections on IRAM.
Before this commit, no other rules matched such sections and the
sections could be placed outside markers that denote the end of the
text sections, causing unexpected errors.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
