When a udp frame is processed without a listener a icmp frame is
returned indicating that there is no listener. The PR enables
sending this icmpv6 response over sixlowpan.
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
The kernel mapping should be performed in sem_wait (thread level) as
virtual memory mappings cannot be added from interrupt, at least for now.
The reason?
kmm_map() depends on mm_map_add(), which in turn uses a mutex for mutual
exclusion. Using mutexes from interrupt level is not permitted.
Mapping tcb->waitobj into kernel virtual memory directly in sem_wait()
makes sense, since accessing tcb->waitobj via a user virtual address can
lead to unexpected results (the wrong mappings can be in place).
Add the mtimer _tick operations for use when tickless mode is not used.
This corrects the tick-based timing calculations, removing tick timer drift
and rounding errors causing early wdog expirations.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
I found that the gpio example code can't be tested on nrf5340-dk.
Enabling CONFIG_DEV_GPIO wouldn't register gpio pins as /dev/gpio*.
NRF5340-dk has 4 LEDs and 4 User Buttons.
By setting CONFIG_DEV_GPIO=y,
- 4 LEDs will be configured as GPIO outputs
- 2 Buttons as GPIO inputs, and
- 2 Buttons as GPIO interrupt inputs
This PR will allows user to test GPIO examples on NRF5340-dk board.
Signed-off-by: Aung Khant Maw <aungkhantmaw64@gmail.com>
Use the CDCACM as a SYSLOG output device, send message to remote proc.
If there are more than one CDCACM devices, then a device minor number
may also need to be provided. Default: 0
Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
Add support for the STM32H5 ICACHE peripheral. The CortexM33 does not have typical embedded icache and dcache. Instead STM32H5 provides the ICACHE as a separate peripheral that needs to be configured. This commit adds the stm32h5 specific icache driver. This driver named functions like those in <nuttx/cache.h>. However since the CortexM33 does not have cache itself, ARCH_ICACHE is not enabled. Therefore these stm32h5 specific functions were developed.
Signed-off-by: kywwilson11 <kwilson@2g-eng.com>
This commit addresses an issue where calling `wd_cancel_period` within the periodic watchdog callback would fail to cancel the watchdog timer.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
This prevents CI from testing esp32s3-devkit:python automatically,
avoiding it to be overloaded. Manual testing can be triggered to
test xtensa-03.dat.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
I found an issue when using SPI with nbits=8: SPI reads return unreliable
results because SPI ignores nbits value and always performs 16-bit reads.
Signed-off-by: Daniel Martín Gómez <danielmartingomez@geotab.com>
Fix build error with the following condition.
- CONFIG_BOARD_CRASHDUMP_CUSTOM=y
- CONFIG_COREDUMP=n
The condition for calling `coredump_initialize()` is incorrect.
CONFIG_BOARD_CRASHDUMP_CUSTOM is not dependent on CONFIG_COREDUMP.
Signed-off-by: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
Fix timestamp in socket CAN. Right now the timestamp is only generated
if there is no reader and the frame is stored in the read ahead list.
This is solved by moving the timestamp generation before the code flow
branch.
Signed-off-by: Javier Casas <javiercasas@geotab.com>
This PR adds a photo of PINE64 StarPro64 SBC to the StarPro64 page.
I shot the photo myself with a Sony NEX-7 camera.
Signed-off-by: Lup Yuen Lee <luppy@appkaki.com>
radio transceivers. This initial support includes transmit and receive
functionality and configuration and reading of radio parameters like
frequency and bandwidth.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
ifdelay description (delay between frames) matches the DLYBCT field
(delay between consecutive transfers without removing chip select)
much better compared to stopdelay (delay between last CLK and CS
innactive). The option for stopdelay does not seem to be configurable
in SAMv7 peripheral.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This PR adds support for the PINE64 StarPro64 64-bit RISC-V SBC,
based on ESWIN EIC7700X SoC. Most of the code was derived from NuttX
for Milk-V Duo S (SOPHGO SG2000). The modified code is explained here:
https://lupyuen.github.io/articles/starpro64#appendix-port-nuttx-to-starpro64
`platforms/risc-v/eic7700x/index.rst`:
Added StarPro64 to EIC7700X SoC
`platforms/risc-v/eic7700x/boards/starpro64/index.rst`:
Building and booting NuttX for StarPro64
Signed-off-by: Lup Yuen Lee <luppy@appkaki.com>
This PR adds support for the PINE64 StarPro64 64-bit RISC-V SBC,
based on ESWIN EIC7700X SoC. Most of the code was derived from NuttX
for Milk-V Duo S (SOPHGO SG2000). The modified code is explained here:
https://lupyuen.github.io/articles/starpro64#appendix-port-nuttx-to-starpro64
Modified Files:
boards/Kconfig: Added StarPro64 board
New Files in boards/risc-v/eic7700x/starpro64:
src/eic7700x_appinit.c: Startup Code
include/board.h: StarPro64 Definitions
include/board_memorymap.h: Memory Map
src/etc/init.d/rc.sysinit, rcS: Startup Script
src/.gitignore: Ignore the tmp filesystem
scripts/ld.script: Linker Script
scripts/Make.defs: StarPro64 Makefile
src/Makefile: StarPro64 Makefile
Kconfig: StarPro64 Config
configs/nsh/defconfig: Build Config for starpro64:nsh
Signed-off-by: Lup Yuen Lee <luppy@appkaki.com>
Data form serial framework will be written to usb reqbuf directly,
and data form cdcacm will be read form reqbuf directly.
Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
This fixes a crash at boot on 64-bit risc-v systems which need to store
64-bit registers to the stack aligned to 8 byte boundary.
Specifically, this uses 8 bytes to store ra and s0 on rv32 and 16 bytes on
rv64, and does the register stores and loads properly aligned acc. to the
register size.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
Replace inline functions with macros to avoid confilcts with builtin definition
nuttx/include/strings.h:80:28: warning: declaration of 'ffs' shadows a built-in function [-Wshadow]
80 | static inline_function int ffs(int j)
| ^~~
nuttx/include/strings.h:94:28: warning: declaration of 'ffsl' shadows a built-in function [-Wshadow]
94 | static inline_function int ffsl(long j)
| ^~~~
nuttx/include/strings.h:109:28: warning: declaration of 'ffsll' shadows a built-in function [-Wshadow]
109 | static inline_function int ffsll(long long j)
| ^~~~~
Signed-off-by: chao an <anchao.archer@bytedance.com>
This commit includes a change to the esp_txint function in the arch/risc-v/src/common/espressif/esp_usbserial.c file. The change primarily involves removing an optimization workaround and adding a call to flush the transmit FIFO.
After this change the usbserial config is able to work using all optimization levels.
Changes in esp_txint function:
Removed the __attribute__((optimize("O0"))) workaround.
Added a call to usb_serial_jtag_ll_txfifo_flush() at the beginning of the function.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
In the USB interface descriptor of the cdcacm device, class:2 (CDC)
subclass:2 (ACM) protocol:0 (NONE) may appear. At this time, the
usb host does not match the correct protocol byte, which will cause
the device identification to fail.
Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
It is now possible to configure SPI delays for st7789 controller if
CONFIG_SPI_DELAY_CONTROL is set. Default values for SPI peripheral
may be too long or too short, therefore the display controller set
its own values as required. The default values in configuration
are taken from the reference manual, but it is possible they may
require tuning for different revisions or temperatures for
example.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This PR adds support for the ESWIN EIC7700X RISC-V SoC.
This will be used by the upcoming port of NuttX for PINE64 StarPro64 SBC.
Most of the code was derived from NuttX for SOPHGO SG2000 SoC.
The modified code is explained here:
https://lupyuen.github.io/articles/starpro64#appendix-port-nuttx-to-starpro64
Modified Files in arch/risc-v:
Kconfig: Added ARCH_CHIP_EIC7700X for EIC7700X SoC
New Files in arch/risc-v:
include/eic7700x/chip.h: EIC7700X Definitions
include/eic7700x/irq.h: External Interrupts
src/eic7700x/chip.h: Interrupt Stack Macro
src/eic7700x/eic7700x_allocateheap.c: Kernel Heap
src/eic7700x/eic7700x_head.S: Linux Header and Boot Code
src/eic7700x/eic7700x_irq.c: Configure Interrupts
src/eic7700x/eic7700x_irq_dispatch.c: Dispatch Interrupts
src/eic7700x/eic7700x_memorymap.h: Memory Map
src/eic7700x/eic7700x_mm_init.c, eic7700x_mm_init.h: Memory Mgmt
src/eic7700x/eic7700x_pgalloc.c: Page Allocator
src/eic7700x/eic7700x_start.c: Startup Code
src/eic7700x/eic7700x_timerisr.c: Timer Interrupt
src/eic7700x/hardware/eic7700x_memorymap.h: PLIC and UART Base Address
src/eic7700x/hardware/eic7700x_plic.h: PLIC Register Addresses
src/eic7700x/Kconfig: EIC7700X Config
src/eic7700x/Make.defs: Makefile
Signed-off-by: Lup Yuen Lee <luppy@appkaki.com>
This PR adds support for the ESWIN EIC7700X RISC-V SoC.
This will be used by the upcoming port of NuttX for PINE64 StarPro64 SBC.
Most of the code was derived from NuttX for SOPHGO SG2000 SoC.
The modified code is explained here:
https://lupyuen.github.io/articles/starpro64#appendix-port-nuttx-to-starpro64
platforms/risc-v/eic7700x/index.rst: Added EIC7700X SoC
Signed-off-by: Lup Yuen Lee <luppy@appkaki.com>
