Commit graph

58737 commits

Author SHA1 Message Date
michal matias
c5a3089e87 drivers/net: Add support for the NCV7410 10BASE-T1S MAC-PHY
This commit adds driver for the Onsemi NCV7410 10BASE-T1S
Ethernet MAC-PHY.

Signed-off-by: michal matias <mich4l.matias@gmail.com>
2025-06-28 08:49:46 -03:00
Serg Podtynnyi
0883d664c4 ci/docker: bump risc-v toolchain
Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-06-28 17:54:52 +08:00
guohao15
57d83907dd bugfix: share kernel thread group should not dup files from caller group
after this commits
  commit e7fa4cae6cbf567266985c8072db1f51ad480943
  Author: Yanfeng Liu <yfliu2008@qq.com>
  Date: Fri May 17 06:11:52 2024 +0800

  sched/tcb: use shared group for kthreads

all kernel thread share group idle
and should not dup filelist to this group

Signed-off-by: guohao15 <guohao15@xiaomi.com>
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2025-06-27 21:45:33 +08:00
SPRESENSE
74d52767e9 drivers/sensors: Add a header file as a dependency
Add a dependent header file required to use cxd5602pwbimu.

Signed-off-by: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
2025-06-27 21:45:02 +08:00
wangmingrong1
ecd6a1db1a ci/arm64: Enhance CI inspection
1. nsh_fiq: arm64 clang makefile
2. nsh_gicv2: arm64 clang cmake

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-27 20:44:41 +08:00
wangmingrong1
6b8bcd673b arm64/toolchain.defs: clang should specify target
If not specified, the corresponding libgcc. a cannot be found

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-27 20:44:41 +08:00
wangmingrong1
3314201f64 arm64/cmake: support clang compile
enable CONFIG_ARM64_TOOLCHAIN_CLANG can use clang compiler

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-27 20:44:41 +08:00
wangmingrong1
86762145de Delete unused function
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-27 20:44:41 +08:00
Filipe Cavalcanti
fbe7d3a1f0 documentation: update Xtensa ESP32|S2|S3 toolchain version
Updates the instructions to install the ESP toolchain 14.2.0.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-06-27 20:41:43 +08:00
Filipe Cavalcanti
1a5f051fbf ci: update ESP32 Xtensa compiler version
Updates ESP32, ESP32S2 and ESP32S3 compiler version to 14.2.0 of 20241119.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-06-27 20:41:43 +08:00
Alin Jerpelea
095a4ecd19 Documentation: add NuttX-12.10.0 release notes
Add release notes for 12.10.0 release

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2025-06-27 20:20:40 +08:00
Xiang Xiao
4e4cd77fd1 libc: Change atomic_fetch_cxx to macro
to align with atomic64_fetch_cxx function prototype

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2025-06-26 23:47:10 +08:00
wangmingrong1
9af2f0ee82 mempool: Support mempool address and size alignment by setting CONFIG_MM_NODE_GUARDSIZE
Setting a reasonable CONFIG_MM_NODE_GUARDSIZE can ensure absolute alignment of usersize

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:33:29 +08:00
wangmingrong1
e6f77d7f14 mempool: Use the same magic with mmheap
mmheap magic: #define MM_INIT_MAGIC    0xcc #define MM_ALLOC_MAGIC   0xaa #define MM_FREE_MAGIC    0x55

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:33:29 +08:00
wangmingrong1
a98f3f2417 mm: Support CONFIG_MM_NODE_GUARDSIZE configuration
After it is not zero, the preceding member of the next node will no longer belong to the valid area of the previous alloc node.
Due to the existence of precedence, the memory block size of the node can only be aligned with sizeof(mmsize_t).
This configuration will be applied in the following scenarios when set 8:
	ARM64 MTE hardware tag KASan, which requires the tag's memory address to be 16-byte aligned and the memory size must also be 16-byte aligned

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:33:29 +08:00
wangjianyu3
5079105e17 boards: net tcp backlog is enabled by default
The configuration NET_TCPBACKLOG is enabled by default.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-06-26 09:32:54 -03:00
wangjianyu3
c1aa625bdb net: enable tcp backlog by default
If the NET_TCPBACKLOG configuration is not enabled, no I/O event will be
triggered for the socket file descriptor in poll/epoll. As a result, the
connection will not be accepted, leading to a failure in the TCP handshake.

The problem is that users may not have noticed this configuration,
no event will be received when polling the socket fd.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-06-26 09:32:54 -03:00
wangmingrong1
3ca0d1e478 fix compile error
Because the location of the macro is moved, other archs cannot find the corresponding macro

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
e97e33eadc toolchain: Support KASAN compilation above Clang18
1. When the Clang compiler turns on "-fsanitize=kernel-address", inlining, global variables, and stack detection are enabled by default and must be turned off manually.
2. -mllvm is the parameter passing method of Clang, and --param is the parameter passing method of GCC
After the modification, KASan compilation and operation will be supported for Clang 18 and above

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
7b902caf94 arm: Move some cp15 macros to cp15 header files
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
c6a528ef11 spinlock: fix stxr instruction status register requirement
error: unpredictable STXR instruction, status is also a source
   99 |     "stxr     %w0, %1, [%2] \n"
      |      ^
<inline asm>:5:10: note: instantiated into assembly here
    5 | stxr     w10, x10, [x9]
Using w0 to pass the result can cause the "status register is also a source" problem, resulting in unpredictable behavior.

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
68a1774eae arm64/smc: Support limited compilation
Only el3 arch may need to use it, let's limit it to

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
5206cc84d8 arm64/armv8r: Support CPUs without hardware floating point
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
66260f81f4 UNUSED: UNUSED may be defined elsewhere.
Give priority to using macros defined by third-party libraries

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
acf0256164 arm64: Support change toolchain to clang
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
e219066397 arm64: Used by irrelevant macro switch position
Add unused_code to avoid compilation errors

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
df3d84b514 arm64: fix compile error
when CONFIG_SMP is disabled, If the cpu parameter is not used, an error will be reported

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
f445652a35 Delete unused functions
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
4c755c7401 arm64: Fix add immediate value irregular behavior
The ARM64 instruction ADD has a 12-bit limit (0 - 4095) for immediate values, but here we try to use a symbolic address (.Linitparms) as an immediate value, which does not comply with the ARM64 instruction set rules.

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
wangmingrong1
dd8819e517 arm64: Explicitly specify register type as x in assembly (arm64)
common/arm64_cache.c:305:38: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths]

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 20:31:19 +08:00
dongjiuzhu1
7ecfbcdaab fs/fs_files: restore fd before calling fdlist_install
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2025-06-26 09:31:14 -03:00
dongjiuzhu1
224dc48a95 drivers/serial: fix the issue of the refs count for filep being zeroed out by utilizing dup2
file_open will clear filep, include f_refs

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2025-06-26 09:31:14 -03:00
dongjiuzhu1
e85cdac2ed fs/vfs: clear filep when call file_open/file_mq_open to avoid random value
fix crash caused by stack random value

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2025-06-26 09:31:14 -03:00
wangmingrong1
bdd3869d26 debug/0 address: Add 0 address access panic configuration
Implemented using up_debugpoint_add

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-06-26 19:25:31 +08:00
simbit18
4270235bfa arch: Fix Kconfig style
Remove spaces from Kconfig
Add TABs
Add comments
2025-06-26 02:30:46 +08:00
simbit18
7d5b9cbb96 drivers/serial: Fix Kconfig style
Remove spaces from Kconfig
Add TABs
2025-06-26 02:30:46 +08:00
simbit18
7c0bda7f9f boards: Fix Kconfig style
Remove spaces from Kconfig
Add TABs
2025-06-26 02:30:46 +08:00
simbit18
22c02963ac drivers/segger/CMakeLists.txt: Aligned Cmake with Make
Segger SysView has been upgraded to version V3.5.6
https://github.com/apache/nuttx/pull/13847

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-06-25 22:20:39 +08:00
ouyangxiangzhen
42ebe289b0 spinlock: Remove atomic.h inclusion in spinlock_type.h
Since the spinlock_type.h is designed to avoid including atomic.h in
the userspace, we should remove `atomic.h` inclusion in spinlock_type.h.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-06-25 22:13:00 +08:00
ouyangxiangzhen
d9bbdeb6fe spinlock: Better recursive spinlock implementation.
This commit provided a better recursive spinlock implementation with
less memory-overhead and better performance.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-06-25 22:13:00 +08:00
ouyangxiangzhen
0717928b0e spinlock: Fix compilation error with atomic.h.
This commit fixed compilation error with atomic.h included.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-06-25 22:13:00 +08:00
Alin Jerpelea
5fee15f4bc AUTHORS: add Rodrigo Sim
Rodrigo Sim submitted the ICLA and should be added to the AUTHORS file

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2025-06-25 21:22:03 +08:00
Alin Jerpelea
74d63d974f AUTHORS: add Filipe do Ó Cavalcanti
Filipe do Ó Cavalcanti submitted the ICLA and should be added to
 the AUTHORS file

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2025-06-25 21:22:03 +08:00
simbit18
1f98d90825 drivers/sensors/CMakeLists.txt: Aligned Cmake with Make
Add:
    Adafruit NAU7802 ADC sensor
    MCP9600 Thermocouple Amplifier
    Maxim MAX31865

Removed repeated addition of the Rohm BH1749NUC Color Sensor

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-06-25 20:40:15 +08:00
halyssonJr
3ecdcf556e add lcd suport 2025-06-24 16:29:00 +08:00
Filipe Cavalcanti
2ddfab618b documentation: update docs on SDMMC for ESP32|S2|S3 2025-06-24 08:08:55 +08:00
Filipe Cavalcanti
02dae3e5eb boards/xtensa: add SDMMC SPI defconfig to ESP32|S2|S3 boards
Adds a defconfig for SDMMC over SPI to the following boards:
esp32-devkitc, esp32s2-saola-1 and esp32s3-devkit.

Renames the defconfig name for:
esp32-lyrat and esp32-wrover-kit.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-06-24 08:08:55 +08:00
Filipe Cavalcanti
aedce4c648 boards/xtensa/esp32: use common board source for SDMMC
Deletes board specific sdmmc implementation in favor of a common source and header file.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-06-24 08:08:55 +08:00
Filipe Cavalcanti
452292159b boards/xtensa: support SDMMC over SPI on ESP32-S2|S3
Adds support for SDMMC over SPI on ESP32S2 and ESP32S3.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-06-24 08:08:55 +08:00
halyssonJr
ba38432a0e Modify type to avoid compilation warning. 2025-06-24 07:49:36 +08:00