Remove function prototypes for BMP180 pressure sensor and CS4344 audio DAC
devices that were never actually present on this board configuration. This
cleans up the header file by removing declarations for non-existent hardware.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit fixes the function to select the GPIO behavior for the
pins associated to the board's button.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Update board reset with BOOTROM functions calls
- normal reboot
- reboot to bootloader
normal reboot and reboot bootloader now possible from nsh
Port of https://github.com/apache/nuttx/pull/16848
Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
ld: unrecognized option '-g3'
ld: use the --help option for usage information
Because `arch/arm/src/common/Toolchain.defs` already contains
`ARCHOPTIMIZATION += $(CONFIG_DEBUG_SYMBOLS_LEVEL)`, so
`boards/arm/sama5/jupiter-nano/scripts/Make.defs` here directly
delete `ARCHOPTIMIZATION += $(CONFIG_DEBUG_SYMBOLS_LEVEL)`.
Signed-off-by: v-tangmeng <v-tangmeng@xiaomi.com>
"tc397" is a chip name which is not appropriate to act as a board name.
the board supported here is actually "a2g-tc397-5v-tft".
The correct definition is : tricore is arch name, tc3xx is arch family
name, tc397 is chip name and the borad name is a2g-tc397-5v-tft
PIC32CZCA70 Curiosity evaluation kit now initializes and registers
a partition in an embedded flash. The end of the flash is used as
an example to avoid the interference with the actual code.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
The NCV7410 driver will be replaced. This commit removes current support for
the NCV7410 driver from the board level.
Signed-off-by: michal matias <mich4l.matias@gmail.com>
Introduce EXT1 wakeup functionality to the ESP32-S3 power management
subsystem. With this feature, the ESP32-S3 can wake up from PM_STANDBY
or PM_SLEEP when one or more RTC GPIOs trigger the EXT1 condition.
Changes include:
- Added EXT1 wakeup configuration and preparation logic in rtc code.
- Integrated EXT1 handling in pmstandby() and pmsleep().
- New board-level Kconfig options under ESP32-S3 DevKit menu:
- CONFIG_PM_EXT1_WAKEUP: enable EXT1 wakeup support
- CONFIG_PM_EXT1_WAKEUP_RTC_GPIO<n>: select RTC GPIOs as wake sources
- CONFIG_PM_EXT1_WAKEUP_TRIGGER_MODE: choose wakeup on HIGH or LOW level
- Fixing Kconfig style
- Fixing comments standard
- Adding PM documentation for esp32s3-devkit
Impact:
- No build impact unless CONFIG_PM_EXT1_WAKEUP is enabled.
- When enabled, ESP32-S3 can wake from low-power states via RTC GPIOs.
- No new public API introduced; controlled via board Kconfig.
Tested on ESP32-S3 DevKit:
- Configured GPIO4 and GPIO5 as EXT1 wake sources.
- Verified wakeup from light sleep and deep sleep on external signals.
- Wakeup reason correctly reported as EXT1.
Signed-off-by: Thiago Finelon <thiago.sfinelon@gmail.com>
Add a new defconfig that includes support for an ADS7046 sensor
and extend the existing documentation to include its description.
Signed-off-by: Niccolò Maggioni <nicco.maggioni+nuttx@gmail.com>
- Added esp32s3_board_spislavedev.c with board-level SPI slave logic
- Added esp32s3_board_spislavedev.h public header in common/include
- Updated Make.defs to include the new source when CONFIG_SPI_SLAVE_DRIVER=y
- Adding spislv board config to esp32s3-devkit
- Adding documentation of esp32s3 devkit spi slv
- Fixing path include in esp32s3_board_spislavedev.c
- Fixing relative path in the header of esp32s3_board_spislavedev.h
- Removing neasted check in Make.defs, consistency reasons
This provides initial support for SPI slave device initialization
on ESP32-S3 boards, making the feature available under conditional
build configuration.
Signed-off-by: Thiago Finelon <thiago.sfinelon@gmail.com>
Add support for the Texas Instruments TMP112 I2C/SMBus digital
temperature sensor. Also add a new defconfig that includes
support for a TMP112 sensor and extend the existing documentation
to include its description.
Signed-off-by: Niccolò Maggioni <nicco.maggioni+nuttx@gmail.com>
Prior to this commit, it wasn't possible to load ELF modules from
the external PSRAM. There were two main issues about it: 1) copying
data using the instruction bus was being used instead of the data
bus (this, per si, isn't a problem, but requires special attention
regarding data alignment), and 2) the cache was not being properly
cleaned and flushed to properly access the loaded data using the
instruction bus.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
If both SPI Flash support (`CONFIG_ESP32S3_SPIFLASH`) and PSRAM
(`CONFIG_ESP32S3_SPIRAM`) are enabled, the PSRAM can only be
assigned to the user's heap (`CONFIG_ESP32S3_SPIRAM_USER_HEAP`).
Additionaly, `CONFIG_ESP32S3_SPI_FLASH_SUPPORT_PSRAM_STACK` must be
set because the system will end up allocating tasks' stacks from
the external PSRAM. This has an impact when dealing with SPI flash
operations because the cache must be disabled and the running task
should not rely on any data from the PSRAM. To accomplish that, It
offloads the SPI flash operation to a work queue (which, by
definition, allocates its heap from the kernel heap).
The same (assigning the PSRAM to the user's heap) is valid when the
Wi-Fi is enabled because the lower-half driver requires data being
allocated from the internal memory (which can only be achieved by
allocating from the kernel heap when both the kernel and user heaps
exists).
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit adds the missing `board_memorymap.h` file for all the
ESP32-S3's boards. This header file is necessary whenever Wi-Fi
is enabled, for instance.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Use this command to extract archives.
Not all architectures are modified, only those commands I know
or could be logically deducted from the rest were added.
Signed-off-by: Stepan Pressl <pressl.stepan@gmail.com>
Update board reset with BOOTROM functions calls
- normal reboot
- reboot to bootloader
normal reboot and reboot bootloader now possible from nsh
Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
Add documentation for changes made in #16809.
Add an example defconfig for a nsh build with the capture example.
Replace the STM32H7_CAP option with just CAPTURE as the guard for the
lower half driver.
Signed-off-by: Côme VINCENT <44554692+comejv@users.noreply.github.com>
Enabling a higher channel of the internal ADC had the effect of
initializing the lower ones as well. Now that happens only if
actively requested.
Also, the functions for handling the internal ADC did not follow
the typical naming used by comparable modules for the same arch
and were renamed for coherence. Informational logging calls were
also made slightly more useful and discernible in case of having
multiple ADCs.
Signed-off-by: Niccolò Maggioni <nicco.maggioni+nuttx@gmail.com>
Remove the debug symbols from "usbdisk" board profile and change
the optimization level from "-Os" to "-O2" to fix ehci error.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
This PR add support to USBHOST on iMXRT1052 ARCX-Socket-Grid board
and add a USBDISK board config example.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
This commit introduces a timer capture driver for the STM32H7 series
ported from the STM32 F series.
The main changes include:
- A new generic timer capture driver for STM32H7.
- A lower-half driver to integrate with the NuttX capture subsystem.
- Kconfig options to enable and configure capture for various timers.
- Pin definitions for TIM1-4 capture inputs on the nucleo-h743zi.
- An update to `cap_register_multiple` to handle multiple device registration.
- An update to `stm32_bringup` to register the capture drivers.
The current implementation is based on a driver originally for PWM input,
and as such, it calculates duty cycle and frequency. It is also limited
to a single capture channel per timer.
The original implementation's `stm32_cap_init` in
`arch/arm/src/stm32h7/stm32_capture.c` has been modified to accept a
channel number instead of using a hardcoded 0 through
`STM32_CAP_CHANNEL_COUNTER`.
This serves as a foundation for future development of more comprehensive
input capture capabilities on STM32H7 platforms.
Tested by polling and reading `/dev/cap0-4` with
`ioctl(fds[i], CAPIOC_FREQUENCE, freq)` while sending a square wave signal to
appropriate pins and checking frequency.
Also tested by bypassing upper half driver and setting up capture on
TIM4 channels 1-4 as explained in #16762.
Signed-off-by: Côme VINCENT <44554692+comejv@users.noreply.github.com>
NVBLK provides a block device that operates on top of a non volatile
memory (as a mtd device) that enables wear levelling for non volatile
memory. It's operation is similar to the dhara wear levelling library,
but nvblk is meant to be used on smaller (nor, mram, rram) memory.
I am also the author and maintainer of the nvblk library.
A block device can be created during startup by using:
```
nvblk_initialize(0, mtd, CONFIG_MTD_NVBLK_DEFAULT_LBS,
CONFIG_MTD_NVBLK_DEFAULT_IOBS,
CONFIG_MTD_NVBLK_DEFAULT_SPEB);
```
and a fat filesystem on top of this as:
```
nsh> mkfatfs /dev/mtdblock0
nsh> mount -t vfat /dev/mtdblock0 /mnt
```
this fat filesystem can then be used:
```
nsh> echo "test" > /mnt/test.txt
nsh> cat test.txt
test
nsh>
```
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Mostly for CI purposes to validate OP-TEE changes
against a flat build. It has not been runtime-tested
with any specific setup involving an actual OP-TEE.
Signed-off-by: George Poulios <gpoulios@census-labs.com>
This commit adds support for MAX31855 and MAX6675 thermocouple
sensors on the STM32F401RC-RS485 board via SPI1. It also updates
the board documentation accordingly.
Signed-off-by: Rodrigo Sim <rcsim10@gmail.com>
This commit adds support for the HX711 ADC in the STM32F4-Discovery
board and updates the board documentation accordingly.
Signed-off-by: Rodrigo Sim <rcsim10@gmail.com>
- Added support for ADC2 initialization and registration.
- Defined new ADC2 channels and corresponding pin mappings.
- Expanded ADC1 channel list and updated pin mappings.
- Updated board.h with additional ADC channel definitions.
- Ensured all ADCs are properly initialized and registered.
- Tested by opening and reading /dev/adc0 and /dev/adc1, checking
that the correct values are read.
Signed-off-by: Côme VINCENT <44554692+comejv@users.noreply.github.com>
- Committing initial code for DTS. Missing ISR. Works for PCLK1. Cannot get to work for LSE.
- Pushing everything. Working with LSE now.
- Many fixes. Fixed interrupt setting. Added data structures.
- Changed interrupt handling. Removed FARs. Added Kconfig options for selecting interrupts.
- Updated info and formatting.
- Formatting fixes.
- Formatting.
- Changed iten to regval.
- Removed Triggger
- Formatting fixes per Pull request.
- Changed private_types to have stm32_ prefix. Used depends on for DTS Kconfig Menu. Fixed formatting per PR.
- Fixed spacing of function prototypes.
- Fixed indent on line
- Added documentation for STM32H5 and Nucleo-H563ZI regarding DTS. Also added GPDMA support to STM32H5 documentation (previous PR). Made stm32_dts.c more modular. stm32_dts_activate is now much more readable. Added comments/descriptions to private functions. Lastly, added a nucleo-h563zi:dts configuration.
