57b8fc9954
This commit provides an interface to register ISRs that run from IRAM and keeps track of the non-IRAM interrupts. It enables, for instance, to avoid disabling all the interrupts during a SPI flash operation: IRAM-enabled ISRs are, then, able to run during these operations. It also makes the code look more similar to the ESP32-S3 SPI flash implementation by creating a common `esp32_spiflash_init` that is responsible to create the SPI flash operation tasks. The function intended to initialize the SPI flash partions was, then, renamed to `board_spiflash_init`. |
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| .. | ||
| chip.h | ||
| core-isa.h | ||
| esp32_himem_chardev.h | ||
| esp_efuse_table.h | ||
| irq.h | ||
| memory_layout.h | ||
| tie-asm.h | ||
| tie.h | ||