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62 commits

Author SHA1 Message Date
nuttxs
46bbde02b1 esp32/esp32_spiflash.c: during the SPI Flash erasure operation, task 
scheduling (yield) is added to prevent the Watchdog Timer from
triggering a reset due to timeout

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
 2025-08-22 20:47:03 +08:00
nuttxs
d1fababfc5 arch/xtensa: esp32(s3)_async_op() using nxsem_wait(), threads may 
return early due to signal interruption (EINTR). This makes the
main thread think the async operation is done, but the background
worker thread is still running—risking access to freed memory,
race conditions, crashes or undefined behavior.

Using nxsem_wait_uninterruptible():the main thread waits until the
worker thread finishes, preventing these issues.

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
 2025-07-18 22:34:13 +08:00
Lars Kruse
3ce85ca54e style: fix spelling in code comments and strings 2025-05-23 10:48:41 +08:00
Filipe Cavalcanti
b8e9bc3313 arch/xtensa: fix build errors related to data types on ESP32|S2|S3 
Fix format specifier macros after compiler type changes.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
 2025-04-18 09:32:58 +08:00
nuttxs
72f3ac98e2 arch/esp32_partition: add some partition operation interfaces for esp32 
Relocate the enum ota_img_ctrl_e and ota_img_bootseq_e
to a directory visible to the application.
Inspect if the MTD partition (factory/ota_0/ota_1) is mapped as text.
Adding an ioctl interface ota_invalidate_bootseq() to the ESP32 partitions,
by deleting the corresponding otadata, makes the boot sequence (ota_0/1) invalid.

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
 2025-03-27 02:21:04 +08:00
Gao Feng
5afed2cb00 xtensa/esp32: write encrypt func implementation 
based on spec, 16 bytes alignment is checked.
 2025-03-27 02:20:14 +08:00
Gao Feng
da845163a3 xtensa/esp32: add lock for async operation work 
g_work as singleton can be changed by context switching,
but previous one async operation have not finished yet.

adapt based on: 10a1d17a85
 2024-12-30 18:14:32 +08:00
Filipe Cavalcanti
8153307da5 espressif: remove static from spiflash operations 2024-09-30 20:42:00 +02:00
fangxinyong
7b05a550dc sched: replace up_cpu_index with this_cpu 
Make this_cpu is arch independent and up_cpu_index do that.
In AMP mode, up_cpu_index() may return the index of the physical core.

Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
 2024-09-05 12:09:24 +08:00
Tiago Medicci Serrano
78fbc2fc64 esp32/spiflash: Fix error to pause the other CPU during operation 
Whenever a SPI flash operation will take place, it's necessary to
disable the cache and run no code from the flash. This includes
pausing the other CPU (when `CONFIG_SMP=y`). This commit prevents
an error to occur when the CPU core is evaluated before the task
is increased to the max priority.
 2024-03-29 16:14:27 +08:00
chenwen@espressif.com
1665114fd1 xtensa/esp32: Fix issue of system blocking when SPIRAM is used as stack 
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
 2024-02-28 13:31:30 +08:00
Tiago Medicci Serrano
8752e6d863 esp32/hardware: Rename efuse_reg.h to esp32_efuse.h. 2024-01-21 06:33:25 -08:00
Tiago Medicci Serrano
b25793ebac esp32/spiflash: Make it similar to ESP32-S3 by removing cache state 2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
57b8fc9954 esp32/irq: Allow IRAM ISRs to run during SPI flash operation 
This commit provides an interface to register ISRs that run from
IRAM and keeps track of the non-IRAM interrupts. It enables, for
instance, to avoid disabling all the interrupts during a SPI flash
operation: IRAM-enabled ISRs are, then, able to run during these
operations.

It also makes the code look more similar to the ESP32-S3 SPI flash
implementation by creating a common `esp32_spiflash_init` that is
responsible to create the SPI flash operation tasks. The function
intended to initialize the SPI flash partions was, then, renamed to
`board_spiflash_init`.
 2023-11-10 09:11:35 +08:00
Lucas Saavedra Vaz
5f1dca63ae arch/xtensa/esp32: Add missing SPI Flash ROM functions 
Add missing ROM functions and clear source files
 2023-05-27 03:16:20 +08:00
Dong Heng
663b4c4f34 xtensa/esp32: Tasks use PSRAM as stack can do SPI flash read/write/erase/map/unmap 2023-03-23 09:26:09 -03:00
Gustavo Henrique Nihei
e6b204f438 nuttx: Use MIN/MAX definitions from "sys/param.h" 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-02-01 23:47:44 +08:00
Xiang Xiao
9f027208d4 fs: Add model field to geometry and mtd_geometry_s 
the model is very useful to track the device info

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-01-31 11:50:28 -03:00
Dong Heng
67ccee2c4f xtensa/esp32: ESP32 SPI Flash encryption supports 16-bytes align writing 2023-01-10 01:10:10 +08:00
anjiahao
d1d46335df Replace nxsem API when used as a lock with nxmutex API 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-17 15:59:46 +09:00
Xiang Xiao
bdeaea3742 Remove the unnessary empty line after label 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-30 17:54:56 +02:00
Gustavo Henrique Nihei
8a4c9c3489 arch: Fix typo in "register" word 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-13 22:57:19 +03:00
Xiang Xiao
2976accd9f arch: Remove the extra space before the function prototype 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
77792a1598 sched: Define CONFIG_SMP_NCPUS to 1 in no SMP case 
to simplify the SMP related code logic

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-20 23:21:21 +08:00
Gustavo Henrique Nihei
80da9abd6a xtensa/esp32: Move assertions after logging to improve debugging 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-30 12:35:41 +08:00
Gustavo Henrique Nihei
b6addaa4c7 xtensa/esp32: Enable the creation of encrypted Flash partitions 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-30 12:35:41 +08:00
Petro Karashchenko
3ccb657dc2 nuttx: remove space befone newline in logs 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2021-12-27 21:01:19 -06:00
Dong Heng
a59aae6927 esp32/esp32c3: Fix MMU pages number calculation error 2021-11-07 21:59:54 -06:00
Abdelatif Guettouche
7b43d11435 esp32_spiflash.c: Allocate only one variable to hold the cache state in 
single CPU mode.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
f54a929001 esp32_spiflash.c: Keep the index of the other CPU between SPI Flash 
operations.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
dfe1637864 esp32_spiflash.c: Pause the other CPU during flash operation. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
2834d2a46f esp32_spiflash.c/esp32_spiram.c: Remove some unused macros/functions/variables. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-23 02:49:11 -07:00
Gustavo Henrique Nihei
e13dd7dab9 arch/xtensa: Remove FAR qualifier for Xtensa-specific files 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-09-22 08:16:01 -03:00
Abdelatif Guettouche
15b68b9abb esp32_spiflash.c: Correctly disable APP's CPU cache. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-17 17:43:45 -03:00
Xiang Xiao
af72376773 fs: Remove magic field from partition_info_s 
since it is wrong and impossible to return file
system magic number from the block or mtd layer.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-20 09:19:52 -03:00
Xiang Xiao
71269811ca mtd: Implement BIOC_PARTINFO for all drivers 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-16 10:08:26 -03:00
Gustavo Henrique Nihei
a7a922611b xtensa/esp32: Enable the allocation of multiple SPI Flash partitions 
Currently the "esp32_spiflash_alloc_mtdpart" allocates a
statically-defined partition from "offset" and "size" set via
Kconfig.
This commit changes the function interface to receive those information
as arguments, enabling the creation of multiple MTD partitions with
different offsets and sizes.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-07-29 20:17:13 +02:00
Gustavo Henrique Nihei
df2e890cfc xtensa/esp32: Implement MTDIOC_ERASESTATE for SPI Flash driver 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-07-17 09:00:41 -07:00
Xiang Xiao
2e54df0f35 Don't include assert.h from public header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-03 08:36:03 -07:00
Xiang Xiao
0fdde5be26 arch/esp32: Fix error: Mixed case identifier found 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-10 12:00:06 +01:00
Matias N
ab206687bb Replace wrong inclusion of sys/errno.h (toolchain provided) with errno.h 2021-04-07 21:27:06 -05:00
YAMAMOTO Takashi
c230edea29 esp32_ummap: write back spiram cache before calling Cache_Flush 
This seems to fix esp32_readdata_encrypted() with spiram "buffer".

Note: I'm not sure if this is the right fix or not.
I couldn't find any documentation about Cache_Flush.
 2021-03-02 08:37:50 +00:00
Gustavo Henrique Nihei
ed0a1b724b xtensa/esp32: Fix typos reported by codespell 2021-02-25 15:02:15 +00:00
chenwen
dcec04f5b2 xtensa/esp32: Writeback PSRAM data when mapping SPI Flash address to ESP32's address bus 2021-02-09 08:26:45 -03:00
Gustavo Henrique Nihei
29b9cf652e xtensa/esp32: Add extern modifier to ROM function declaration 2021-02-05 14:05:44 -03:00
Abdelatif Guettouche
685c2ce506 esp32_spiflash.c: Fix preprocessor condition. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-02-05 12:16:55 -03:00
Alan C. Assis
c4f87977dc xtensa/esp32: Fix cache issue detected by DEBUG_ASSERTION 2021-02-04 21:22:01 +00:00
Masayuki Ishikawa
b9d4bd0854 arch: esp32: Fix compile errors with CONFIG_SMP=y 
Summary:
- This commit fixes compile errors in esp32_spiflash.c and
  esp32_wifi_adapter.c with CONFIG_SMP=y

Impact:
- SMP only

Testing:
- Tested with esp32-devkitc:wapi
- NOTE: the following configs need to be added.
  +CONFIG_SMP=y
  +CONFIG_SMP_IDLETHREAD_STACKSIZE=3072
  +CONFIG_SMP_NCPUS=2
  +CONFIG_SPINLOCK_IRQ=y

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-01-27 04:47:05 -08:00
Abdelatif Guettouche
6bf826acca arch/xtensa/src/esp32/esp32_spiflash.c: Fix the value of the page start 
address.
It was incorrectly taken from the size.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-01-26 15:27:16 -03:00
Abdelatif Guettouche
81a9eb190d arch/xtensa/src/esp32/esp32_spiflash.c: Invalidate the cache and 
writeback PSRAM data if the flash address used has a cache mapping.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-18 16:43:52 -03:00