After irq_dispatch finished, the interrupt stack will be checked to
determine whether overflow occurs.
The relevant configuration reuses the configuration of stack overflow
detection during context switching.
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
Many different architectures re-implemented the exact same code for
`up_*delay` because it was originally written as architecture dependent
code. Busy-waiting can be done regardless of architecture, so this
commit moves that duplicated implementation to a common file with weak
definitions so that individual architectures (see tc32) are still able
to override the definition if needed/desired.
Default implementation is not included if ARCH_TIMER is enabled, since
it is more accurate and provides its own weak definitions to override.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Many times, context switching does not occur when the thread stack
memory is almost exhausted, so we need to mofify up_check_tcbstack to
accurately detect it.
Co-authored-by: Chengdong Wang <wangchengdong@lixiang.com>
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
Added ioctls and functions for watchdogs 2 & 3. Modifed wdog1 functions. Needs testing.
Fixed issues with started variable.
Change to add only 3 ioctls, a config for each watchdog. Created cfg structures for watchdog1 and watchdog23. Added code to set difsel register. stop conversions before changing watchdog configs. Other logic changes.
Define AN_STM32H5_FIRST and AN_STM32H5_NCMDS in nuttx/analog/ioctl.h
Remove hardcoded AN_STM32H5_FIRST.
Style fixes.
Fix thershold for watchdog1
Got working watchdog driver with queue and signal. Needs polish.
Refined isr for watchdogs. Added value back to event. value is more accurate, but not guaranteed. It accomdates dma.
Used stm32_adc_sigcfg_s structure inside stm32_adc_sig_s structure. Used common naming for ioctls.
Added stopifstarted and startifstopped for setting watchdogs and other bits. Added adc_reset_dma, which must be run after stopping conversions in circular mode, because buffer and conversions become misaligned. Other refinements.
Added guard around adc_reset_dma, added comment blocks to new functions
NuttX style fixes.
Add return value to wdog configure functions.
Correct number of stm32h5 adc ioctls.
Minor style fix.
Reduce watchdog commit to fit NuttX standards. Remove Queue and Signal aspects. Added Kconfig to initialize watchdog.
Signed-off-by: kywwilson11 <kwilson@2g-eng.com>
Added guard around code referencing priv->circular. Added adc_watchdog config for testing watchdog1 with adc1. Added documentation about adc_watchdog config.
Adjusted documentation for adc_watchdog config. Added detailed test procedure.
Longer underline under adc_watchdog title.
Add code for differential adc calibration. Need to calibrate both single-ended and differential if a given adc has both single-ended and differential channels.
Fixed typo.
Initialize watchdog1 parameters at compile time when configured. Added comments to new elements in stm32_dev_s. Confirmed style is good.
Add proper guards around ADC WDG1 variables and functions.
Implemented feedback per raiden00. 1. Changed to use old chanlist type uint8_t. 2. Added smpr1, smpr2, and difsel variables to stm32_dev_s structure. 2. smpr1 and smpr2 are initialized to board defined values if BOARD_ADCx_SMPRx is defined, otherwise initialized to default. 3. difsel initialized to BOARD_ADCx_DIFSEL if defined, otherwise use default (0) for all single-ended.
The arm-m architecture svc call will trigger an interrupt,
and the actual context switch is executed after doirq is completed,
so only the scheduling information needs to be updated in doirq.
In the arm-a/r architecture, interrupts and syscalls are independent,
and scheduling information needs to be updated in both locations
Co-authored-by: yinshengkai <yinshengkai@xiaomi.com>
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
Currently the mdio communication is part of the monolithic 'full netdevs'.
This commit serves as an way to add modularity for the netdevs drivers.
A new upperhalf/lowerhalf mdio device comes with this commit that manages the data transfer ofer mdio interface.
Signed-off-by: Luchian Mihai <luchiann.mihai@gmail.com>
- Created a file rp2040_common_pico.h with function
prototype
int rp2040_dev_gpio_init(void);
to allow cmake + ninja to build without errors.
- Updated file rp2040_pico.h with
for all boards.
Signed-off-by: simbit18 <simbit18@gmail.com>
- CMake added board Raspberry Pi Pico
- Added the entry:
CMake,raspberrypi-pico:bmp280
to the file arm-06.dat.
- Moved the search for the Python 3 interpreter to the
root CMakefile to avoid unnecessary repetition.
Signed-off-by: simbit18 <simbit18@gmail.com>
Add STM32H7_STM32H7X0XX chip family.
Add new chip configurations for STM32H750 variants in Kconfig, update
hardware includes to support CONFIG_STM32H7_STM32H7X0XX, and modify
board configurations for stm32h750b-dk to use STM32H750XB.
This enables support for the new STM32H750 chip series with appropriate
memory and peripheral mappings.
Normalize the defconfig files for boards from stm32f7 chip family.
Signed-off-by: Sergey Rzhevsky <rzsa@yandex.ru>
This patch addresses several issues and adds enhancements to the WWDG
(Window Watchdog) implementation for the STM32H7 platform. The changes
include:
- Extend the definitions of WWDG_CFR_PCLK1 macros to support dividers
up to 128, and update the stm32_settimeout() function to consider this
extended range.
- Fix the "elapsed" calculations in the stm32_getstatus() function to
ensure correct time remaining calculations.
- Clear the EWIF (Early Wakeup Interrupt Flag) bit in the stm32_start()
function, as this bit might be set by hardware before the watchdog is
actually started.
- Initialize the WWDG clock in the RCC_APB3ENR register and set the
RCC_GCR_WW1RSC bit as per the STM32 reference manual to ensure proper
behavior when enabling the WWDG1.
Signed-off-by: Szymon Magrian <szymon.magrian@hexagon.com>
SAME70J and SAMV70J series (64 pin packages) have two USART peripherals
and three UART peripherals. Ensure USART peripherals are enabled.
This is consistent with datasheet, USART0 also physically tested
on SAME70J21 MCU.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Adds conditional compilation of the stm32_ltdc.c file to the source list
(SRCS) for STM32H7 architecture when the CONFIG_STM32H7_LTDC option is
enabled in the configuration.
Signed-off-by: Sergey Rzhevsky <rzsa@yandex.ru>
The stack alignment operation in tricore and arm porting
only aligns the size of the stack, forget to align the start addr
of the stack, this patch fixes it.
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
Since the alignment of the signal context is affected by XCPTCONTEXT_SIZE in
different Kconfig, sometimes the stack pointer is not aligned to 8 bytes, this
is not what the software and compiler expect, for example, if va_list() obtains
wide data of type long long, the offset will be wrong, So in this commit, we set
stack-aligned the base offset so that the correct offset will be set during context
restoration.
1. test code:
| void signal_handler(int signo, siginfo_t *info, void *context) {
| long long ttt = 1024000;
| printf("%lld\n", ttt);
| }
|
| struct itimerspec its = { .it_value.tv_sec = 1,
| .it_value.tv_nsec = 0,
| .it_interval.tv_sec = 1,
| .it_interval.tv_nsec = 0
| };
|
| int main(int argc, FAR char *argv[])
| {
| struct sigevent evp;
| timer_t timer_id;
|
| memset(&evp, 0, sizeof(evp));
| evp.sigev_notify = SIGEV_SIGNAL | SIGEV_THREAD_ID;
| evp.sigev_signo = SIGALRM;
| evp.sigev_notify_thread_id = gettid();
|
| timer_create(CLOCK_REALTIME, &evp, &timer_id);
|
|
| struct sigaction sa;
| memset(&sa, 0, sizeof(sa));
| sa.sa_sigaction = signal_handler;
| sa.sa_flags = SA_SIGINFO;
| sigemptyset(&sa.sa_mask);
|
| sigaction(SIGALRM, &sa, NULL);
|
| timer_settime(timer_id, 0, &its, NULL);
|
| while (1)
| sleep(1);
|
| return 0;
| }
2. before this change:
| NuttShell (NSH) NuttX-12.10.0
| nsh> hello
| 4398046527890440
| 4398046527890472
| 4398046527890504
| 4398046527890536
3. after this change:
| NuttShell (NSH) NuttX-12.10.0
| nsh> hello
| 1024000
| 1024000
| 1024000
| 1024000
Signed-off-by: chao an <anchao.archer@bytedance.com>
The functions `hw_write_masked` and `hw_xor_bits` (as defined in
pico-sdk) were defined in NuttX twice.
Additionally these definitions were in conflict (one lacked the
`volatile` modifier).
Now these functions and their dependencies are defined in a new header
file.
Its name is based on the filename of the original definition in
pico-sdk:
src/rp2_common/hardware_base/include/hardware/address_mapped.h
This change should fix the potential issue of GPIO operations failing
due to compiler optimizations caused by the absence of `volatile`.
Signed-off-by: Lars Kruse <devel@sumpfralle.de>
On a system with multiple CPU cores, when the system is powered on,
multiple cores may start running simultaneously. In this case, software
is required to handle the startup logic for multi-core synchronization.
One approach is to use global variables.
however, the global variable region may not have been initialized yet.
In such scenarios, we can use a busywait flag to
implement the synchronization strategy.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
On a system with multiple CPU cores, when the system is powered on,
multiple cores may start running simultaneously. In this case, software
is required to handle the startup logic for multi-core synchronization.
One approach is to use global variables.
however, the global variable region may not have been initialized yet.
In such scenarios, we can use a busywait flag to
implement the synchronization strategy.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Some iMXRT chips like iMXRT-1050 has two USB controllers, but until
now only USB1 was supported. This patch modify the driver to support
both USBs.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
Give the user the full control over the USIC FIFO buffer even if USIC channel 0 is disabled.
When USICx_CHAN0 is not an UART but USICx_CHAN1 is, the user can set the desired FIFO buffer offsets in CHAN1 config.
Update board reset with BOOTROM functions calls
- normal reboot
- reboot to bootloader
normal reboot and reboot bootloader now possible from nsh
Port of https://github.com/apache/nuttx/pull/16848
Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
The following warning occurred if ARCH_CHIP_PIC32CZCA70 option was
selected. The variable is not used in case of PIC32CZ CA70 series.
CC: task/task_getgroup.c chip/sam_emac.c: In function ‘sam_emac_initialize’:
chip/sam_emac.c:4758:12: warning: unused variable ‘regval’ [-Wunused-variable]
4758 | uint32_t regval;
|
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This arch uses code relocation to SRAM through a XIP unit, so forcing segment
permissions manually in the linker script could create unforeseen issues.
A quick fix is setting the "--no-warn-rwx-segments" linker option just for
for the incriminated stage2 bootloader binary.
Signed-off-by: Niccolò Maggioni <nicco.maggioni+nuttx@gmail.com>
Version 2.2.0 of the SDK unified some headers under a new path.
Now both the old and the new paths are searched during compilation.
Signed-off-by: Niccolò Maggioni <nicco.maggioni+nuttx@gmail.com>
Use this command to extract archives.
Not all architectures are modified, only those commands I know
or could be logically deducted from the rest were added.
Signed-off-by: Stepan Pressl <pressl.stepan@gmail.com>
Add capture source files to the makefile pipeline.
STM32H7_CAP to STM32H7_TIMX_CAP for clarity.
Signed-off-by: Côme VINCENT <44554692+comejv@users.noreply.github.com>
Add documentation for changes made in #16809.
Add an example defconfig for a nsh build with the capture example.
Replace the STM32H7_CAP option with just CAPTURE as the guard for the
lower half driver.
Signed-off-by: Côme VINCENT <44554692+comejv@users.noreply.github.com>
Enabling a higher channel of the internal ADC had the effect of
initializing the lower ones as well. Now that happens only if
actively requested.
Also, the functions for handling the internal ADC did not follow
the typical naming used by comparable modules for the same arch
and were renamed for coherence. Informational logging calls were
also made slightly more useful and discernible in case of having
multiple ADCs.
Signed-off-by: Niccolò Maggioni <nicco.maggioni+nuttx@gmail.com>
Add support for the RP2040's GPIO output override capabilities.
Implementation inspired by the uniqueid functions for the same arch.
Signed-off-by: Niccolò Maggioni <nicco.maggioni+nuttx@gmail.com>
The strings "RPC2040" and "RP2040_IO_BANK0_GPIO0", presumably typos,
were used in place of respectively "RP2040" and "RP2040_IO_BANK0_GPIO".
Signed-off-by: Niccolò Maggioni <nicco.maggioni+nuttx@gmail.com>
This patch fixes an incorrect call to stm32_cap_initialize() in
stm32_bringup.c: the call was made without the channel parameter.
Instead of adding the channel in the call, the channel is selected by
stm32_cap_gpio() (first available channel).
This patch also fixes incorrect driver registration in
drivers/timers/capture.c: the driver was registered with the wrong
name (/dev/cap -> /dev/capture). Also added more error checking in
cap_register_multiple().
Signed-off-by: Côme VINCENT <44554692+comejv@users.noreply.github.com>
This PR add support to USBHOST on iMXRT1052 ARCX-Socket-Grid board
and add a USBDISK board config example.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
This commit introduces a timer capture driver for the STM32H7 series
ported from the STM32 F series.
The main changes include:
- A new generic timer capture driver for STM32H7.
- A lower-half driver to integrate with the NuttX capture subsystem.
- Kconfig options to enable and configure capture for various timers.
- Pin definitions for TIM1-4 capture inputs on the nucleo-h743zi.
- An update to `cap_register_multiple` to handle multiple device registration.
- An update to `stm32_bringup` to register the capture drivers.
The current implementation is based on a driver originally for PWM input,
and as such, it calculates duty cycle and frequency. It is also limited
to a single capture channel per timer.
The original implementation's `stm32_cap_init` in
`arch/arm/src/stm32h7/stm32_capture.c` has been modified to accept a
channel number instead of using a hardcoded 0 through
`STM32_CAP_CHANNEL_COUNTER`.
This serves as a foundation for future development of more comprehensive
input capture capabilities on STM32H7 platforms.
Tested by polling and reading `/dev/cap0-4` with
`ioctl(fds[i], CAPIOC_FREQUENCE, freq)` while sending a square wave signal to
appropriate pins and checking frequency.
Also tested by bypassing upper half driver and setting up capture on
TIM4 channels 1-4 as explained in #16762.
Signed-off-by: Côme VINCENT <44554692+comejv@users.noreply.github.com>
This fixes the same issue for other targets, which was already fixed for
xtensa in commit 50d94863.
After the signals have been delivered, the local irqs need to be
disabled until the context switch. But just calling
leave_critical_section(regs[xx]) will enable them if they were
enabled in the context.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
Clear dma interrupt flags as before.
Change HTEF to HTF, fixes typo.
Remove ALL_FLAGS define. Clear CXFCR with all 1s like other instances do.
Handle half-transfer interrupt only if in circular mode.
Add ADC_HAVE_DMA guard around adc_rstart_dma. It is needed because priv->circular is guarded by ADC_HAVE_DMA.
Many iMXRT MCUs have internally two USB OTG controllers, however
NuttX currently only supports one USB controllers. This patch will
prepare the "house" to support both ports at same time.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
