Because sync is a rather expensive operation.
While I'm here, improve the comment after the recent discussion
in https://github.com/apache/nuttx/pull/2913.
IMHO, we should not perform the sync even for O_TRUNC.
But I'm not going to propose the change for now.
Signed-off-by: YAMAMOTO Takashi <yamamoto@midokura.com>
This commit introduces initial support for the Seeed Studio XIAO ESP32S3
board. Two configurations are available: 'usbnsh' provides basic NuttShell
(NSH) access over USB, while 'combo' adds support for GPIOs and onboard
LED in addition to NSH.
test:
1.use mps3-an547 build helloxx as module and run it
2.use qemu-armv7a:knsh test kernel build helloxx and run it
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Some entries have the opendir function set to NULL, for example
g_mount_operations.
A null pointer dereference can be triggered by an
opendir("/proc/fs/blocks") for example.
Signed-off-by: Beat Küng <beat-kueng@gmx.net>
Unify liker scripts for all stm32f0l0g0.
This fixes crash due to unaligned access to rodata for these boards.
Signed-off-by: raiden00pl <raiden00@railab.me>
This commit fixes the SPI flash frequency selection for ESP32-S2,
enabling the Kconfig macros to be selected when ESP32-S2 SoC is
enabled. Please note that this was recently changed to make it
compatible with already existing SPI flash Kconfig macros for ESP32
and ESP32-S3 and it introduced this regression for ESP32-S2.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Remove legacy I2S implementation without breaking defconfigs for Xtensa based Espressif devices
Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
Remove legacy I2S implementation without breaking defconfigs for Xtensa based Espressif devices
Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
There is no need for a gettid() syscall, as the thread ID is stable through
the life of the process. It is safe to put a copy of TID to TLS. This way
a user processes can access TID quickly via its own stack, instead of
having to use an expensive syscall.
Signed-off-by: Ville Juven <ville.juven@unikie.com>
We should not access semaphore internals directly outside sched/semaphore.
Just read it via the NXSEM_COUNT macro provided.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
The defconfigs that select the ESP32-S3's WROOM-2-N32R8V module
contains an octal SPI flash chip and a octal SPIRAM module.
This commit updates the defconfig to avoid errors while booting the
device.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
SPI flash operation modes - Dual Output (dout), Dual I/O (dio),
Quad Output (qout), Quad I/O (qio) and Octal (opi) were not being
properly selected. This commit fixes this behavior and the device
is now able to boot and initialize the proper SPI flash mode.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Support for development using STM32H750B-DK, including configuration of onboard memory, flash, etc., and configuration of LVGL runtime environment has been added.
Signed-off-by: liujp <liujp@xiaomi.com>
boards/arm: Add CMakeLists for the nucleo-l476rg.
Adds CMakeLists files for the STM32L4 architectures
and one of the development boards. Files are adapted
from the similar STM32F7 boards, but built to reflect
the existing Make.defs.
Signed-off-by: Kye Morton <pryre.dev@outlook.com>
This commit adds support for the BMP180 sensor on the
STM32F401RC-RS485 board and updates the board documentation
accordingly. It also enables the BMP180 UORB driver in the
STM32 common logic.
Signed-off-by: Rodrigo Sim <rcsim10@gmail.com>
This commit simplifies the selection of the SPI flash frequency for
Espressif SoCs by using a standardized Kconfig-defined macro.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit moves some internal libraries' .bss sections to the
external PSRAM chip, freeing internal memory for other usages. Note
that it is necessary to update `esp32s3-devkit:python` defconfig
otherwise it would fail to build.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Fix and enable ADC calibration. The ADC voltage regulator must be
enabled and regulator start-up time must be respected.
tested on nucleo-c071rb and b-l072z-lrwan1
Signed-off-by: raiden00pl <raiden00@railab.me>
Optimize crc32 standard(poly:0x04C11DB7) and crc32
castagnoli(poly:0x1EDC6F41) with arm crc32 extension instructions.
For example, crc32 standard caculates(lookup crc32 table) 1812 bytes data,
reduced the time from 118 us to 14 us through optimization.
Performance improved ~700%
Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
