1. support fiq decoding and dispatch
2. replace CONFIG_ARMV8R_DECODEFIQ with CONFIG_ARCH_HIPRI_INTERRUPT
Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
reason:
up_set_current_regs initially had two functions:
1: To mark the entry into an interrupt state.
2: To record the context before an interrupt/exception. If we switch to
a new task, we need to store the upcoming context regs by calling up_set_current_regs(regs).
Currently, we record the context in other ways, so the second function is obsolete.
Therefore, we need to rename up_set_current_regs to better reflect its actual meaning,
which is solely to mark an interrupt.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
when we build mbedtls in vela with ghs compiler, the mbedtls need to
access __ARM_ARCH and __ARM_FEATURE_DSP, and to construct the inline asm
code based on these two macros.
With ghs compiler, these two macros are not defined, and will be
evaluated as 0 by default, and thus will using to wrong inline asm code,
in order to handle this issue, we need to add conversion between the ghs
and gcc with __ARM_ARCH, __ARM_FEATURE_DSP
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
Created stm32h5 directory to add support for the H5 chip, and used a Nucleo-H563ZI dev board during development. The goal was to get a working nutshell through the STLink connector on the board.
Remove board/docs changes for PR update.
Squash commits into one for PR guideline conformity.
trying to fix build issues
Fix format from review
1. init HSCTLR to enable i-cache/d-cache for EL2
2. init HACTLR to enable all access to implementation defined
registers for EL1.
3. add dsb/isb before switch to EL1 from EL2
Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
Need to start up a new to setup special registers use
`arm_pic_setupxcp`.
Note that CONFIG_BUILD_PIC compiles the entire NuttX image
as position-independent(PIC), enable CONFIG_PIC to load PIC
application code.
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Some app with same code runs on different cores in AMP mode,
need the physical core on which the function is called.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
1. Kconfig - Removed USART1 config option from STM32_STM32G47XX. Not necessary to adding LPUART functionality. 2. stm32_lowput.c - Added extra check from STM32G4 board because that is the only with LPUART functionality. 2. stm32_serial.c - Removed unneeded function (stm32_serial_get_lpuart). Fixed up_putc return bug. Added configuration for DMAMAP_LPUART RX and TX for STM32G4XXX only. The G4 is the only in this family with LPUART and uses a DMAMUX unlike the others.
1. Removed 1WIRE LPUART refereences in Kconfig and stm32_uart.h. There is no support for LPUART currently in stm32_1wire.c. 2. Removed references to LPUART under DMA_V2 ifdefs. STM32G4 uses DMA_V1, and I saw that none of the chips DMA_V2 (F20, F4) have LPUARTs. AFAIK the only chip in the stm32 folder that has LPUART peripherals is the STM32G4.
Removed unnecessary brackets and empty lines
Added lpuartnsh (LPUART NuttShell) config to the nucleo-g474re board configurations. nsh uses USART3 by default. lpuartnsh uses nsh as a template, changes the serial console to LPUART1, and adds the DMA configs to enable DMA for the LPUART.
Added support for using the lpuart prescaler register. Without prescaling the apbclock, 9600 baud is not supported on the G474RE. By utilizing the prescaler, when necessary, we can support nearly any baud rate (300 baud to 30M Mbaud). lowputc defaults to a prescaler of 16 for the lpuart so standard baud rates (9600 to 115200) are supported early in the boot process. Later in stm32_serial.c the ideal prescaler and BRR values are determined.
Added ifdef statements for LPUART code sections not compatible with other chips.
Changed LPUART BRR calcuation to use 64-bit integers.
Feedback from nuttx pull request. Added brackets around single line if/else statements. Reordered lpuartnsh defconfig file.
Fix lpuart brr calculation after attempting to break the calculation into 2 lines.
Removed TAB
compile error:
Register: ostest
Register: nsh
Register: sh
Register: hello
Register: getprime
In file included from /home/hujun5/downloads1/vela_sim/nuttx/include/arch/irq.h:35,
from /home/hujun5/downloads1/vela_sim/nuttx/include/nuttx/irq.h:37,
from /home/hujun5/downloads1/vela_sim/nuttx/include/nuttx/sched.h:40,
from /home/hujun5/downloads1/vela_sim/nuttx/include/nuttx/arch.h:87,
from common/arm_signal_dispatch.c:26:
common/arm_signal_dispatch.c: In function 'up_signal_dispatch':
common/arm_signal_dispatch.c:72:3: error: 'asm' operand has impossible constraints
72 | sys_call4(SYS_signal_handler, (uintptr_t)sighand, (uintptr_t)signo,
| ^~~~~~~~~
make[1]: *** [Makefile:168：arm_signal_dispatch.o] error 1
Signed-off-by: hujun5 <hujun5@xiaomi.com>
reason:
when a context switch occurs, up_switch_context is executed.
In order to reduce the time taken for context switching,
we inline the up_switch_context function.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
resson:
using percpu storage for g_current_regs or leveraging interrupt status
registers to determine if code is running within an interrupt context can enhance performance.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
after enable both CONFIG_BUILD_KERNEL and CONFIG_ARCH_VMA_MAPPING
arch.h:141:18: error: 'ARCH_SHM_MAXPAGES' undeclared here
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
reason:
1 On different architectures, we can utilize more optimized strategies
to implement up_current_regs/up_set_current_regs.
eg. use interrupt registersor percpu registers.
code size
before
text data bss dec hex filename
262848 49985 63893 376726 5bf96 nuttx
after
text data bss dec hex filename
262844 49985 63893 376722 5bf92 nuttx
size change -4
Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic \
-machine virt,virtualization=on,gic-version=3 \
-net none -chardev stdio,id=con,mux=on -serial chardev:con \
-mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
In protected build mode, the syscall returns without setting correct value for the CONTROL register, which causes the userspace threads working in privileged mode after syscall.
Signed-off-by: pangzhen1 <pangzhen1@xiaomi.com>
According to the current design on the armv7-a platform,
only fiq is processed in TEE, while irq and fiq are processed
in REE.
If we enable the irq function in TEE, when we process
some signal-related scenarios in TEE,
such as the ostest sighand testcase, this testcase will
call up_irq_enable() to enable irq interrupt in the
arm_sigdeliver() function. After the signal processing
logic is executed, irq will be disabled again.
During the interval of enabling irq, some external device
irq interrupts will be enabled, but these external device
irqs do not have corresponding handlers registered in TEE,
so an "unexpected irq isr exception" will be triggered.
Therefore, a better implementation is to keep the original
implementation of the up_irq_enable() function, that is,
to enable only fiq in TEE and to enable irq and fiq in REE.
Then for vendor-specific requirements, such as the need to
briefly enable irq during the TEE initialization process
and then disable irq before starting APz in TEE, we directly
provide a separate implementation of enabling irq in the
vendor, without modifying the implementation of the public
up_enable_irq() function.
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
CC: unistd/lib_setregid.c "/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/irq.h", line 53: warning #193-D:
zero used for undefined preprocessing identifier "NR_IRQS"
# if NR_IRQS <= 256
^
"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/irq.h", line 82: warning #193-D:
zero used for undefined preprocessing identifier "NR_IRQS"
#if NR_IRQS <= 256
CC: mount/fs_umount2.c "/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/irq.h", line 72: warning #193-D:
zero used for undefined preprocessing identifier "NR_IRQS"
#if NR_IRQS <= 256
Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
the greenhills compiler provide its own implementation of va_start,
va_end, va_arg, va_copy. so if we are build vela with greenhills
compiler, we should using the stdarg implementation provided by
greenhills, not our own
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 252: warning #76-D:
argument to macro is empty
SP_DSB();
^
"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 261: warning #76-D:
argument to macro is empty
SP_DMB();
^
"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 252: warning #76-D:
argument to macro is empty
SP_DSB();
^
"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 261: warning #76-D:
argument to macro is empty
SP_DMB();
^
"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 296: warning #76-D:
argument to macro is empty
SP_DSB();
^
Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
The following are the compile error that reported
by GreenHills compiler:
"/mnt/yang/qixinwei_commit/nuttx/include/arch/syscall.h", line 156 (col. 17): error #2036-D:
cannot allocate "reg0" to specified caller-saved register
"/mnt/yang/qixinwei_commit/nuttx/include/arch/syscall.h", line 157 (col. 17): error #2036-D:
cannot allocate "reg1" to specified caller-saved register
Then we fix this greenhills compilation error by explicitly specifying
the registers in the clobber list in the inline assembly code.
This fix is successful in compiling on the
nuttx/boards/arm/mps/mps2-an500/configs/nsh platform and passes
the ostest test.
However, if we keep the implementation the same for both the default
and Greenhills compilers, the default compiler will report the
following two issues:
1. the "sys_call6" function will report compile error when
compiling on "./vendor/qemu/boards/smartspeaker/configs/smartspeaker-knsh"
platform, the detailed error info:
CC: proxies/PROXY_mq_getattr.c In file included from /home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/sys/syscall.h:35,
from /home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/syscall.h:30,
from proxies/PROXY_mmap.c:5:
In function 'sys_call6',
inlined from 'mmap' at proxies/PROXY_mmap.c:9:22:
/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/syscall.h:297:3: error: 'asm' operand has impossible constraints
297 | __asm__ __volatile__
| ^~~~~~~
2. when running on qemu-armv7-a platform, the modification to
"smh_call()" function will make the system fail to boot up, so
we need to keep the default compiler implementation and greenhills
compiler implementation separate
Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
(cherry picked from commit cb48b749b1c9cad8cfb96bff7c5e9b6ebf20fc8a)
