elf_emit_tcb_note: nitems(status.pr_regs) is 18, g_tcbinfo.regs_num is 17, then g_tcbinfo.reg_off.p[17] has been out of bounds
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
common/espressif/esp_pcnt.c: In function 'esp_pcnt_isr_default':
common/espressif/esp_pcnt.c:396:41: warning: passing argument 1 of 'spin_lock_irqsave' makes pointer from integer without a cast [-Wint-conversion]
396 | flags = spin_lock_irqsave(unit->lock);
| ~~~~^~~~~~
| |
| spinlock_t {aka unsigned char}
In file included from common/espressif/esp_pcnt.c:44:
/home/hujun5/下载/vela_sim/nuttx/include/nuttx/spinlock.h:507:55: note: expected 'volatile spinlock_t *' {aka 'volatile unsigned char *'} but argument is of type 'spinlock_t' {aka 'unsigned char'}
507 | irqstate_t spin_lock_irqsave(FAR volatile spinlock_t *lock)
| ~~~~~~~~~~~~~~~~~~~~~^~~~
Signed-off-by: hujun5 <hujun5@xiaomi.com>
This matches how `PICO_XOSC_STARTUP_DELAY_MULTIPLIER` is set in
pico-sdk.
This should fix issues on startup for some units of these boards. It
seems not all are affected. See
https://github.com/raspberrypi/pico-sdk/pull/457 and the issue linked
there for more information.
Signed-off-by: Ian Douglas Scott <ian@iandouglasscott.com>
This follows the formula in the "Startup Delay" section of the
datasheets, where `BOARD_XOSC_STARTUPDELAY` is the time in milliseconds,
which is then multiplied by the clock fequency in kHz, divided by 256
cycles, and rounded up.
This differs from `pico-sdk`, which just multiplied the value of the
expression it previously used by a `PICO_XOSC_STARTUP_DELAY_MULTIPLIER`.
This seems less correct, though it should be essentially the same except
rounding. (`BOARD_XOSC_STARTUPDELAY_MULTIPLIER` also wouldn't fit nicely
the way the `#define`s are aligned.)
This sets `BOARD_XOSC_STARTUPDELAY` to `1` for all boards, so this will
produce the same output and not change behavior.
Signed-off-by: Ian Douglas Scott <ian@iandouglasscott.com>
Previously this used a hard-coded value of 12 MHz, but this presumably
should use `BOARD_XOSC_FREQ`. Similarly to how it is done in pico-sdk.
It looks like all boards are currently defined to use 12 MHz XOSC
clocks, so this won't change behavior with any of them.
Signed-off-by: Ian Douglas Scott <ian@iandouglasscott.com>
align them with the usage habits of makefile
cmake:
cmake -B build -DBOARD_CONFIG=sim/nsh -GNinja -DEXTRAFLAGS="-DCONFIG_AAA=1 -DCONFIG_BBB=1 -Werror"
makefile:
make -j12 EXTRAFLAGS="-DCONFIG_AAA=1 -DCONFIG_BBB=1 -Werror"
Signed-off-by: chao an <anchao.archer@bytedance.com>
No reason to keep asking for these over and over. Also fix bumping
the CPU booted counter when SBI is enabled.
Must also read g_hart_use_sbi before bumping the CPU booted counter.
add support of set custom command options to config.h
Use the -D parameter to pass the config to header file.
NOTE which must begin with the CONFIG_ prefix.
eg:
cmake -DCONFIG_AAA=1 -DCONFIG_BBB=1 -B build -DBOARD_CONFIG=sim/nsh -GNinja
Signed-off-by: chao an <anchao.archer@bytedance.com>
This adds support for qemu-armv7r board with flat mode sample
config for using with QEMU emulated Cortex-R5 processor.
Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com>
This adds support for QEMU Cortex-R5 virtual processor on existing QEMU
Cortex-A7 code base with profile support in `armv7-r/` and `armv7-a/`.
Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com>
This revise armv7-r/ header files needed to support QEMU cortex-r5
virtual process for armv7-r family.
Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com>
As armv7-a addrenv layout is not in line with other archs, we need
align it with others by defining ARCH_DATA_RESERVE_SIZE as same as
MM_PGSIZE for now to keep gnu-elf.ld.in unified.
Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com>
This fixes compilation error:
```
/tmp/nuttx/arch/arm/src/armv7-r/gic.h:699:17: error:
'GIC_ICDSGIR_NSATT_GRP1' undeclared; did you mean 'GIC_ICDSGIR_NSATT'?
```
Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com>
Summary:
- Replace direct use of `fence.i` instruction with `__ISB()` macro for instruction synchronization
- This change improves portability while maintaining the same functionality
Impact:
- No functional changes - both `fence.i` and `__ISB()` ensure instruction
synchronization on RISC-V
- Makes the code more maintainable by using the architecture abstraction
layer
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Summary:
- Removed explicit -std=c99 flag from Make.defs
- The project-wide C standard is already set at a higher level
- Keeps build configuration consistent across the codebase
Impact:
- No functional changes to the code
- Maintains consistency with project-wide C standard settings
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
copied over files, not modified properly yet
Squashing lots of define errors to get ethernet.c working
quick path rename
Fix STM32_EMAC_BASE (and ICACHE/DCACHE Bases). Enable ETH, ETHTX, and ETHRX with CONFIG_STM32H5_ETHMAC (like H7 does).
Fixed stm32_get_uniqueid
Previously, an exception occurred as a result of calling this function. The problem turned out to be this line: uniqueid[i] = *((uint8_t *)(STM32_SYSMEM_UID) + i);. Dereferencing a 32-bit register as a 8-bit register seemed to be causing this issue. I think this function is better anyway, fewer register accesses and loop iterations.
Turn on SBS peripheral when using Ethernet
The SBS peripheral is required to be turned on because the ETH_SEL_PHY bits need to be set. Without turning this on, RMII mode is not possible. MII may not work either.
Style Updates
Summary:
When spinlock.h is enabled in a single-core scenario, spinlock reentry and exceptions may occur when spin_lock_irqsave_wo_note is used in syslog_add_intbuffer
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
This moves ARM_HAVE_PSCI selection to virtual processor level as
armv7-r chips like Cortex-R5 doesn't have it.
Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com>
These options are unistd-specific and should not be filesystem dependent,
and also not suitable for define in the sched directory.
Signed-off-by: chao an <anchao.archer@bytedance.com>
Corrected CAN FD messages sending in character driver mode.
Assign CAN FD format flag in reception of CAN FD messages.
Corrected some defines mismatches.
The code has been tested in QEMU
qemu-system-x86_64 -m 2G -enable-kvm -smp 1 \
-cpu host,+pcid,+x2apic,+tsc-deadline,+xsave,+rdrand \
-kernel nuttx/nuttx \
-nographic -serial mon:stdio \
-object can-bus,id=canbus0-bus \
-object can-host-socketcan,if=can0,canbus=canbus0-bus,id=canbus0-socketcan \
-device ctucan_pci,canbus0=canbus0-bus,canbus1=canbus0-bus
The overall state of this third party CTU CAN FD driver in NuttX
is far from ideal. It would worth to consult and follow more
closely our Linux kernel driver and even better RTEMS CAN/CAN FD
stack design
https://canbus.pages.fel.cvut.cz/#cancan-fd-subsystem-and-drivers-for-rtems
Signed-off-by: Pavel Pisa <pisa@fel.cvut.cz>
