Commit graph

58823 commits

Author SHA1 Message Date
nuttxs
22560958bc net/arp: reducing unnecessary ARP requests can mitigate
network congestion and avoid packet delays caused by
waiting for ARP responses

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
2025-07-08 12:43:43 -03:00
Niccolò Maggioni
571447bb06 coredump: Fix missing loglevel to logmask conversion.
The current setlogmask call used in coredump_dump_syslog specifies a raw log level
instead of a bitmask, and this causes wrong evaluations later on when that value
is checked against a mask. Therefore the LOG_UPTO macro is added for conversion.

Signed-off-by: Niccolò Maggioni <nicco.maggioni+nuttx@gmail.com>
2025-07-08 21:14:07 +08:00
Xiang Xiao
4c7366045c libc/semaphore: Go the fast path even arch doesn't support atomic
since the simulated atomic operation is still fast than the slow path

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2025-07-08 09:47:44 -03:00
Xiang Xiao
fb14b54b83 libc/semaphore: Use the while loop to handle the inerrupt correctly
If atomic_try_cmpxchg_xxxx runs on LL/SC architectures (e.g.ARMv7,
ARMv8, RISC-V), the weak CAS expands to a single LDREX/STREX pair.

If the CPU takes an IRQ/FIQ/SVC between the two instructions,
hardware performs an implicit CLREX and the following STREX returns
1, therefore atomic_try_cmpxchg_xxxx return failure even though
*addr* still holds the expected value.

So let's retry atomic_try_cmpxchg_xxxx in this case.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2025-07-08 09:47:44 -03:00
Eren Terzioglu
d8f241b29d Documentation/risc-v/esp32[c6]: Add LP_UART support docs
Add LPUART support doc for esp32c6

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-07-08 19:35:54 +08:00
Eren Terzioglu
1c48c0cba7 arch/risc-v/esp32[c6]: Add LP_UART support
Add LP_UART support for esp32c6

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-07-08 19:35:54 +08:00
p-szafonimateusz
880c8e5d26 drivers/net: add IGB network card support
Add support for Intel IGB type of network cards.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-07-08 10:02:15 +02:00
Eren Terzioglu
735e16f842 arch/xtensa: Fix dedicated GPIO build error
Fix dedicated GPIO build error for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-07-08 11:58:15 +08:00
Filipe Cavalcanti
06b37fe6aa arch/risc-v: set SCL timeout for esp_i2c.c
Adds proper timeout settings to SCL on ESP32C3|C6|H2.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-07-08 11:04:05 +08:00
Filipe Cavalcanti
26eb2833cc boards/risc-v: fix config for SPI and I2C drivers
Replaces CONFIG_I2C_DRIVER with CONFIG_I2C for proper build requirements.
Same for SPI. Also changes some logging to syslog.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-07-08 11:04:05 +08:00
Elias Hawa
0ce9e82d73 drivers/sensors: add Quectel L86-XXX GNSS uORB sensor driver 2025-07-07 21:18:15 -03:00
Eren Terzioglu
3f65182699 arch/risc-v: Change DMA functions with common layer approach for esp32[-c3|-c6|-h2]
Change DMA functions with common layer functions for risc-v based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-07-07 23:46:07 +08:00
ligd
230714bd23 local: correct shutdown state when use UDP mode
Signed-off-by: ligd <liguiding1@xiaomi.com>
2025-07-07 23:45:35 +08:00
p-szafonimateusz
9fb8a17d49 boards/qemu-intel64/qemu.ld: add .lbss, .ldata and .lrodata to approriate sections
These sections can be emited by gcc in some cases for huge data blocks.
For  example huge global static uninitialzied arrays can be placed in .lbss section
which can mess NuttX memory organization and cause hard to find bugs.
Unfortunately this is not well documented in GCC and all we have is this bug report:
https://sourceware.org/bugzilla/show_bug.cgi?id=22553

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-07-07 23:45:15 +08:00
zhongzhijie1
f725c59387 tools/checkpatch.sh: simplify Python file type check.
Use existing is_python_file() helper to replace manual string comparison
when checking Python file types.

Signed-off-by: zhongzhijie1 <zhongzhijie1@xiaomi.com>
2025-07-07 23:43:41 +08:00
zhongzhijie1
8c4343c28b tools/checkpatch.sh: add -x option to auto-format Python files.
Currently only .py files are supported. Non-Python files will report "format not implemented".

Signed-off-by: zhongzhijie1 <zhongzhijie1@xiaomi.com>
2025-07-07 23:43:41 +08:00
Jorge Guzman
ec84502e80 board/weact-stm32h743 Add sdcard support
This commit adds SD card support to the WeAct STM32H743 board configuration.
The implementation enables the board to interface with SD cards through the
SDMMC peripheral, allowing file system operations and data storage capabilities.

Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2025-07-07 23:43:32 +08:00
Joshua Lange
d5eda10cad drivers/leds: Add support for KTD2052
This commit adds support for the KTD2052 LED driver chip.

Signed-off-by: Tyler Bennett <tbennett@2g-eng.com>
2025-07-07 09:49:51 -03:00
wangjianyu3
e5b138dee0 boards/szpi-esp32s3: Enable touchscreen for LVGL
1. Rotate the video screen 90 degrees right.
2. Enable touchscreen for the LVGL configuration "lckfb-szpi-esp32s3:lvgl" and add lvgldemo autostart.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-07-07 08:46:58 -03:00
wangjianyu3
5671765acd boards: Update configs and params about FT5X06
Add touchscreen swap configuration for boards and enable it for defconfig that enables `FT5X06_SWAPXY`.
Refresh configurations to delete the deprecated `FT5X06_NPOLLWAITERS` and `FT5X06_SWAPXY`.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-07-07 08:46:58 -03:00
wangjianyu3
770d4a6c86 drivers/input/ft5x06: Adapt to touchscreen frame
Calling touch_register() to register touchscreen driver instead of
registering generic driver.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-07-07 08:46:58 -03:00
wangjianyu3
ed1384fc81 driver/touchscreen: Add support for mirror/swap
Add support for mirror/swap coordinates.
There are some touchscreen drivers not support mirror or swap coordinates.
For example, drivers/input/ft5x06 does not support mirror.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-07-07 08:46:58 -03:00
wangjianyu3
7cd5d3db72 include: fix typo of touch lowerhalf comment
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-07-07 08:46:58 -03:00
wangjianyu3
9f6666b75b driver/touchscreen: add custom open/close
Add custom open/close for lower to init/deinit device.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-07-07 08:46:58 -03:00
Alan Carvalho de Assis
27e2f51d2e Doc/components: Updare refresh.sh to show usage examples
This commit makes it clear how to use the refresh.sh script to
update board configs showing differents usages cenarios.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-07-07 09:53:55 +08:00
raiden00pl
f0270eb349 arch/arm/stm32{h5|h7|l4}/adc: move ADC_MAX_SAMPLES to Kconfig
move ADC_MAX_SAMPLES to Kconfig so user can fine tune memory usage

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-07-06 21:27:52 -03:00
Eren Terzioglu
5991a8c4cc xtensa/espressif: Change LEDC implementation to common for Xtensa based Espressif chips
Change LEDC implementation to common one for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-07-05 11:12:06 +08:00
chenxiaoyi
886718ade1 xtensa: support more than 32 cpu interrupts
The architecture defines maximum of 128 interrupts, whereas previous
code only supported 32 interrupts.  For every 32 interrupts added,
there are three additional registers: INTERRUPT, INTCLEAR, and INTENABLE.
This patch adds support for handling these registers.

Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2025-07-04 11:26:07 -03:00
raiden00pl
b2158c8e3c arch/arm/stm32f0l0g0/adc: move ADC_MAX_SAMPLES to Kconfig
move ADC_MAX_SAMPLES to Kconfig so user can fine tune memory usage

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-07-04 18:14:31 +08:00
Shen Cao
8e68c7a810 arch/arm: Add gic lock for GICD_ICFGR RMW operations.
GICD_ICFGR requires full 32-bit RMW operations.
Each interrupt uses 2 bits; thus updates must be synchronized
to avoid losing configuration in concurrent environments.

RMW conflict on GICD_ICFGRn (without lock)

CPU0 (set IRQ32 edge)      CPU1 (set IRQ33 level)
---------------------      -----------------------
val0 = read(ICFGRn)     │  val1 = read(ICFGRn)
                        │
val0 |= (edge << 4)     │
                        │  val1 &= ~(3 << 6)
                        │
write(ICFGRn, val0)     │
                        │  write(ICFGRn, val1)

=> IRQ32 config lost OR IRQ33 config lost
   (depends on which write finishes last)

Concurrent RMW on ICFGRn causes lost config.
Protect with spinlock to avoid data race.

Since interrupt type configuration is infrequent,
a single global GIC lock is sufficient (no need for
fine-grained locking per ICFGR register).

Signed-off-by: Shen Cao <caoshen3@lixiang.com>
2025-07-03 19:02:50 -03:00
Carlos Sanchez
a9da6fde59 arch/arm/src/*/stm32_fdcan_sock.c: prevent interrupt flood on errors.
Previous code was failing to disable error interrupts which
due to standard CAN retransmissions might trigger continusouly
(for example, with a disconnected CAN interface) flooding the
system and preventing other operations to continue.

Fixes: https://github.com/apache/nuttx/issues/16668
Signed-off-by: Carlos Sanchez <carlossanchez@geotab.com>
2025-07-04 02:00:52 +08:00
p-szafonimateusz
bba1741421 drivers/net/{e1000|igc}: align descriptors to 8
A descriptor ring length must be aligned to 128, one descriptor is 16B length,
so we can provide this condition with the appropriate number of descriptors

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-07-03 21:57:02 +08:00
p-szafonimateusz
5a9530855c drivers/net/{e1000|igc}: drop TX packets if TX ring is full
drop TX packets if TX ring is full, so we don't overwrite
not handled TX descriptors

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-07-03 21:57:02 +08:00
p-szafonimateusz
0f537dcb97 drivers/net/{e1000|igc}: fix reinit for RX/TX rings
Descriptor head is managed by HW and should not be modified by SW unless:
1. device is after a reset
2. device is before enabling TX or RX

Also set correct tail for RX which should point at the end of ring
(descriptor ring is zero-indexed).

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-07-03 21:57:02 +08:00
p-szafonimateusz
bdde180d7a drivers/net/{e1000|igc}: disable TX by modify only TX enable bit
disable TX by modify only TX enable bit, otherwise we lose TX configuration

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-07-03 21:57:02 +08:00
p-szafonimateusz
0a8ef045ab drivers/net/{e1000|igc}: update link status when card is enabled
Update link status in case link status interrupt is missing.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-07-03 21:57:02 +08:00
p-szafonimateusz
7a8ac49836 drivers/net/{e1000|igc}: do not touch RX/TX rings when link status change
Do not reset RX/TX rings when link status change.
This can break internal card state which is impossible to recovery.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-07-03 21:57:02 +08:00
p-szafonimateusz
bccee707d6 drivers/net/{e1000|igc}: reset RX/TX rings after RX/TX disabled
reset RX/TX rings **after** RX/TX are disabled to make sure the rings are
not used by hardware when software modify rings state.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-07-03 21:57:02 +08:00
Antoine Juckler
eea2975b36 tools/process_config.sh: Fix sed errors
Ignore commented-out lines when deleting repeated defines in defconfig

Signed-off-by: Antoine Juckler <6445757+ajuckler@users.noreply.github.com>
2025-07-03 09:41:56 -03:00
Tim Hardisty
f45216ecb3 boards/arm/lpc17xx_40xx_lincoln60: correct typo in thttpd-binfs defconfig 2025-07-03 10:42:16 +08:00
wangmingrong1
1df6aa92f9 arm64: Support hardware debug
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-07-03 00:20:54 +08:00
wangmingrong1
3c2b203286 arm64->fetal: Support return to thread site
The breakpoint of arm64 is fetal_handler, which needs to return to the scene

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-07-03 00:20:54 +08:00
wangmingrong1
10a13b98ee compiler-rt: distclean delete error
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-07-03 00:17:58 +08:00
chenxiaoyi
46504837ca clang/gcov: fix the open flags and mode
Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2025-07-03 00:17:58 +08:00
wangmingrong1
a87170681d libbuitin: Fixed the issue of not creating bin directory when the file exists
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-07-03 00:17:58 +08:00
buxiasen
8c93783fee gcov: fix link undefined error
undefined reference to `__gcov_execle'

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-07-03 00:17:58 +08:00
wangmingrong1
82a4b21863 gcov: Output mode judgment is implemented in the kernel layer
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-07-03 00:17:58 +08:00
wangmingrong1
062ac70470 CMake: Fix compile error
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-07-03 00:17:58 +08:00
wangmingrong1
3648e5db3f gcov: Refactoring the implementation framework of gcov
All implementations of gcov are sunk to the kernel implementation
1. Support three dump modes: serial port output, single file output, standard output

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-07-03 00:17:58 +08:00
wangmingrong1
1cb5077bc1 gcov: default strip 0 path
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2025-07-03 00:17:58 +08:00