Commit graph

57824 commits

Author SHA1 Message Date
chao an
1d383a243f libs/libnx: do not generate resource if CONFIG_NX is not enabled
To avoid generate resource if CONFIG_NX is disabled:
| $ make -j12
| Create version.h
| CPP:  nxfonts_convert.c-> nxfonts_convert_8bpp.i
| CPP:  nxfonts_convert.c-> nxfonts_convert_24bpp.i

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-02-20 08:45:05 +01:00
Ville Juven
ff4d461fda mpfs_irq.c: Interrupt claim must be cleared before disabling the source
From Polarfire SoC TRM:

6.5.8 Interrupt Completion

To signal the completion of executing an interrupt handler, the processor core writes the received interrupt ID to the
Claim/Complete register. The PLIC does not check whether the completion ID is the same as the last claim ID for that
target. If the completion ID does not match an interrupt source that is currently enabled for the target, the completion
is ignored.

The last paragraph clearly states that IRQ completion does not work for
sources that have been disabled -> must ACK the completion before disable.

Signed-off-by: Ville Juven <ville.juven@unikie.com>
2025-02-19 15:22:16 -03:00
Matteo Golin
8de9dd9515 drivers/sensors/lsm6dso32: fixed byte read command to include start.
This is required to meet the communication requirements as per the
LSM6DSO32 datasheet. It doesn't cause issues on some MCUs (RP2040), but
prevents successful reads on others (STM32).

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-02-19 15:21:08 -03:00
Filipe Cavalcanti
becba7153f arch/risc-v: improve nested interrupt assertion on riscv_doirq 2025-02-19 14:55:33 -03:00
Tiago Medicci Serrano
b417495284 arch/risc-v: support backtrace dump during IRQ
Adds support for backtrace when the system crashes during IRQ for RISC-V.
Tested with SMP, no SMP and no interrupt stack.
2025-02-19 14:55:33 -03:00
lijing.ly
6bd191e7e0 drivers/rpmsg/Kconfig: Add SPI dependency for RPMSG_PORT_SPI
If SPI dependency is not set, the following warning will be generated during compilation:

[109/1450] Building C object drivers/CMakeFiles/drivers.dir/rpmsg/rpmsg_port_spi.c.o
/data/code/nuttxspace/nuttx/drivers/rpmsg/rpmsg_port_spi.c: In function ‘rpmsg_port_spi_exchange’:
/data/code/nuttxspace/nuttx/drivers/rpmsg/rpmsg_port_spi.c:233:3: warning: implicit declaration of function ‘SPI_EXCHANGE’ [-Wimplicit-function-declaration]
  233 |   SPI_EXCHANGE(rpspi->spi, txhdr, rpspi->rxhdr,
      |   ^~~~~~~~~~~~
[1450/1450] Pac SIM with dynamic libs in nuttx.tgz

Signed-off-by: lijing.ly <lijing.ly@bytedance.com>
2025-02-19 14:52:22 -03:00
Zhu Zhongjie
2ebce06b79 board/arm/rp2040: support config st7789 reset gpio pin
Signed-off-by: Zhu Zhongjie <zhongjiezhu1@gmail.com>
2025-02-19 14:50:58 -03:00
Tiago Medicci Serrano
436dbe3f0b Documentation/esp32s3: Add ESP32-S3's PSRAM entry
Add entry for the external PSRAM support on ESP32-S3 and document
how to move data to the external PSRAM to free the internal memory.
2025-02-19 11:44:18 -03:00
Tiago Medicci Serrano
97aa90570c xtensa/esp32s3: allow moving .bss data to the external PSRAM
This commit allows placing .bss data into the external PSRAM.
Previously, the PSRAM was fully allocated to the heap memory only
and now part of it can be used to allocate .bss data freeing the
internal memory.
2025-02-19 11:44:18 -03:00
wangjianyu3
32bc95182a Documentation/esp32s3-devkit: Add doc for USB Fastboot
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-02-19 14:25:28 +08:00
wangjianyu3
321b25f486 esp32s3-devkit: Add fastboot starting command to initialization script
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-02-19 14:25:28 +08:00
wangjianyu3
746db1968d esp32s3-devkit/fastboot: Initializing configuration for Fastboot
Based on configuration of usb_device.

Quick start:

    ./tools/configure.sh -l esp32s3-devkit:fastboot
    make flash -j ESPTOOL_PORT=/dev/ttyACMx

(Optional) You can get full defconfig by executing following commands after SAVING your stages if necessary:

    ./tools/configure.sh -l esp32s3-devkit:fastboot
    make savedefconfig
    cat defconfig

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-02-19 14:25:28 +08:00
Roy Feng
c9a8f96aac xtensa/esp32: set cpuint to initial value after deallocate
on ESP32, cpuint was allocated when register wdt handler, but not
deallocated when unregister, which cause debug assert when checking
`DEBUGASSERT((*freeints & bitmask) == 0)`, so set cpuint to initial value
after deallocate.

The same issue on ESP32s3 has been fixed by PR#15433
2025-02-18 11:32:07 -03:00
Neo Xu
05e1cb736c doc: add GDB Plugin commands table
Add a table of commands we extend using GDB python API.
Add irqinfo command documentation.

Signed-off-by: Neo Xu <neo.xu1990@gmail.com>
2025-02-18 11:16:17 -03:00
Neo Xu
504c3dddf0 doc: update GDB python plugin path
The NuttX GDB python plugin has been moved to tools/pynuttx/nxgdb.
Update all documentation including this path.

Signed-off-by: Neo Xu <neo.xu1990@gmail.com>
2025-02-18 11:16:17 -03:00
xuxingliang
1bfb42d127 nxgdb/irq: add irqinfo command
(gdb) irqinfo
IRQ  COUNT      TIME   RATE   HANDLER                                          ARGUMENT
0    0          0      N/A    mps_reserved                             0x0 <sensor_unregister>
2    0          0      N/A    mps_nmi                                  0x0 <sensor_unregister>
3    0          0      N/A    arm_hardfault                            0x0 <sensor_unregister>
4    0          0      N/A    arm_memfault                             0x0 <sensor_unregister>
5    0          0      N/A    arm_busfault                             0x0 <sensor_unregister>
6    0          0      N/A    arm_usagefault                           0x0 <sensor_unregister>
11   1          0      N/A    arm_svcall                               0x0 <sensor_unregister>
12   0          0      N/A    arm_dbgmonitor                           0x0 <up_debugpoint_remove>
14   0          0      N/A    mps_pendsv                               0x0 <up_debugpoint_remove>
15   6581421    0      N/A    systick_interrupt                        0x100010c <g_systick_lower>
49   2          0      N/A    uart_cmsdk_tx_interrupt                  0x1000010 <g_uart0port>
50   0          0      N/A    uart_cmsdk_rx_interrupt                  0x1000010 <g_uart0port>
59   2          0      N/A    uart_cmsdk_ov_interrupt                  0x1000010 <g_uart0port>
(gdb)

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2025-02-18 11:16:17 -03:00
xuxingliang
06c7e2a02e nxgdb/utils: add has_field and fix ArrayIterator
1. Add method to check if an object has specified field.
2. Fix Array iterator that walrus expression should store result of the
   function, instead of the compare result.

Note that walrus operation has lowest priority except ','.

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2025-02-18 11:16:17 -03:00
chao an
27d5a1b4b7 arm/memory_barrier: fix build warning on GCC14
nuttx/include/arch/spinlock.h:66:9: warning: "UP_DSB" redefined
   66 | #define UP_DSB() __asm__ __volatile__ ("dsb sy" : : : "memory")
      |         ^~~~~~
In file included from nuttx/include/arch/barriers.h:37,
                 from nuttx/include/arch/spinlock.h:34:
nuttx/include/arch/armv8-m/barriers.h:42:9: note: this is the location of the previous definition
   42 | #define UP_DSB()  arm_dsb(15)
      |         ^~~~~~
nuttx/include/arch/spinlock.h:67:9: warning: "UP_DMB" redefined
   67 | #define UP_DMB() __asm__ __volatile__ ("dmb st" : : : "memory")
      |         ^~~~~~
nuttx/include/arch/armv8-m/barriers.h:41:9: note: this is the location of the previous definition
   41 | #define UP_DMB()  arm_dmb()
      |         ^~~~~~

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-02-18 09:04:54 -05:00
chao an
5a64967ce7 nuttx/compiler: fix build warning on GCC14
nuttx/include/arch/armv8-m/irq.h:496:36: warning: 'always_inline' function might not be inlinable unless also declared 'inline' [-Wattributes]
  496 | static always_inline_function bool up_interrupt_context(void)
      |                                    ^~~~~~~~~~~~~~~~~~~~
nuttx/include/arch/armv8-m/irq.h:490:41: warning: 'always_inline' function might not be inlinable unless also declared 'inline' [-Wattributes]
  490 | static always_inline_function uintptr_t up_getusrsp(void *regs)
      |                                         ^~~~~~~~~~~
nuttx/include/arch/armv8-m/irq.h:477:40: warning: 'always_inline' function might not be inlinable unless also declared 'inline' [-Wattributes]
  477 | static always_inline_function uint32_t up_getsp(void)
      |                                        ^~~~~~~~
nuttx/include/arch/armv8-m/irq.h:451:40: warning: 'always_inline' function might not be inlinable unless also declared 'inline' [-Wattributes]
  451 | static always_inline_function uint32_t getpsp(void)
      |                                        ^~~~~~
nuttx/include/arch/armv8-m/irq.h:441:36: warning: 'always_inline' function might not be inlinable unless also declared 'inline' [-Wattributes]
  441 | static always_inline_function void setcontrol(uint32_t control)
      |                                    ^~~~~~~~~~
nuttx/include/arch/armv8-m/irq.h:428:40: warning: 'always_inline' function might not be inlinable unless also declared 'inline' [-Wattributes]
  428 | static always_inline_function uint32_t getcontrol(void)
      |                                        ^~~~~~~~~~

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-02-18 09:04:54 -05:00
Filipe Cavalcanti
954081cdd8 xtensa/esp32s3: use common Espressif wireless source
Update the wireless symbols from ESP32S3_* to ESPRESSIF_* for using common layer.
Remove ESP32S3 specific WiFi files and edit build system to use common layer.
2025-02-17 12:03:57 +01:00
raiden00pl
38c348bf9a boards/b-g431b-esc1/cansock: enable SocketCAN utils
boards/b-g431b-esc1/cansock: enable SocketCAN utils, so user can easly use CAN tools

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-02-17 14:13:29 +08:00
raiden00pl
3a0870df1c boards/nucleo-f446re/cansock: enable SocketCAN utils
boards/nucleo-f446re/cansock: enable SocketCAN utils, so user can easly use CAN tools

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-02-17 14:13:29 +08:00
raiden00pl
425b2683cd boards/nucleo-f302r8/cansock: enable SocketCAN utils
boards/nucleo-f302r8/cansock: enable SocketCAN utils, so user can easly use CAN tools.

This board has only 64KB of FLASH which requires some additional optimization to fit CAN tools on it.

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-02-17 14:13:29 +08:00
raiden00pl
27dd63d147 boards/nucleo-g431rb/cansock: enable SocketCAN utils
boards/nucleo-g431rb/cansock: enable SocketCAN utils, so user can easly use CAN tools

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-02-17 14:13:29 +08:00
raiden00pl
0317df5b43 boards/nucleo-f722ze/cansock: enable SocketCAN utils
boards/nucleo-f722ze/cansock: enable SocketCAN utils, so user can easly use CAN tools

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-02-17 14:13:29 +08:00
Yanfeng Liu
3fca03f23b board/qemu-armv7r: add PROTECTED mode
This adds initial bootable PROTECTED mode config `qemu-armv7r:pnsh`,
more tests are still needed. Flat mode config qemu-armv7r:nsh still
works.

- The nuttx.ld is for building nuttx ELF
- The nuttx_user.ld is for building nuttx_user ELF

They both include the memory.ld with preprocessing.

To run, use the QEMU mentioned in PR:

```sh
$ qemu-system-arm -M virt -semihosting -nographic -cpu cortex-r5f \
           -device loader,file=nuttx_user -device loader,file=nuttx
```

Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com>
2025-02-17 14:12:22 +08:00
Yanfeng Liu
64bae41c6b board/qemu-armv7r: rename dramboot.ld
This aligns linker script file name with built program name so that
nuttx.ld helps to build nuttx ELF

Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com>
2025-02-17 14:12:22 +08:00
xuxingliang
1b94d0e2cf nxgdb/mm: show pool expand queue size
nqueue has been added to output.

E.g.
(gdb) mm pool
Total 16 pools
                      total blocksize     bsize  overhead     nused     nfree    nifree   nwaiter    nqueue
 Umem@0x10048dc        4068        16        16         0         3       251         0         0         1
 Umem@0x100493c        4068        32        32         0         3       124         0         0         1
 Umem@0x100499c        4036        48        48         0        10        74         0         0         1
 Umem@0x10049fc        4036        64        64         0         1        62         0         0         1
 Umem@0x1004a5c           0        80        80         0         0         0         0         0         0
 Umem@0x1004abc           0        96        96         0         0         0         0         0         0
 Umem@0x1004b1c           0       112       112         0         0         0         0         0         0
 Umem@0x1004b7c           0       128       128         0         0         0         0         0         0
 Umem@0x1004bdc           0       144       144         0         0         0         0         0         0
 Umem@0x1004c3c           0       160       160         0         0         0         0         0         0
 Umem@0x1004c9c           0       176       176         0         0         0         0         0         0
 Umem@0x1004cfc           0       192       192         0         0         0         0         0         0
 Umem@0x1004d5c        3956       208       208         0         1        18         0         0         1
 Umem@0x1004dbc           0       224       224         0         0         0         0         0         0
 Umem@0x1004e1c           0       240       240         0         0         0         0         0         0
 Umem@0x1004e7c           0       256       256         0         0         0         0         0         0
(gdb)

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2025-02-16 11:23:38 -03:00
JianyuWang
1e7532c381 drivers/thermal: Break loop if matching active trip point
Co-authored-by: Donny(董九柱) <70748590+Donny9@users.noreply.github.com>
2025-02-16 11:22:41 -03:00
wangjianyu3
fef1a0702d drivers/thermal/dummy: Add another passive cooling device
For case that CPUFreq was not enabled.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-02-16 11:22:41 -03:00
wangjianyu3
0b633946c0 drivers/thermal: Add support for passive trip point
Spliting `THERMAL_NORMAL` to `THERMAL_ACTIVE` and `THERMAL_PASSIVE`,
to support different update intervals for thermal zone.

Active/Passive from [kernel.org](https://www.kernel.org/doc/Documentation/devicetree/bindings/thermal/thermal.txt):

  * Cooling device nodes

  Cooling devices are nodes providing control on power dissipation. There
  are essentially two ways to provide control on power dissipation. First
  is by means of regulating device performance, which is known as passive
  cooling. A typical passive cooling is a CPU that has dynamic voltage and
  frequency scaling (DVFS), and uses lower frequencies as cooling states.
  Second is by means of activating devices in order to remove
  the dissipated heat, which is known as active cooling, e.g. regulating
  fan speeds. In both cases, cooling devices shall have a way to determine
  the state of cooling in which the device is.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2025-02-16 11:22:41 -03:00
Ville Juven
c57c95755d mpfs/mpfs_irq.c: Enable interrupts on all harts
Instead of enabling an interrupt on the calling hart, enable it on every
hart. This should balance the interrupt load some, especially in cases
where the interrupt source is enabled only once (which will almost
certainly happen on CPU 0 only).

Signed-off-by: Ville Juven <ville.juven@unikie.com>
2025-02-16 10:25:19 +01:00
buxiasen
af0aa78cbc arm-a/shm: fix issue when use shm in arm-a
When the l1entry first add to shm, mssing l1entry add.
shm mmu flags should use udata flags.
l1entry record in shm[] and should not use ~SECTION_MASK

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-02-15 18:44:26 -03:00
buxiasen
71888c5c5f arm-v7a: fix mmu record list occupation when more than 1M
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-02-15 18:44:26 -03:00
Andre Heinemans
e7fdaeb61d imx9: scmi: update to scmi 3.2 spec 2025-02-15 12:28:10 -03:00
Ramin Seyed-Moussavi
70d092061d arch/arm/max326xx: add max32690 gpio driver
definitions for the max32660 moved to max32660_gpio.h

the max32690 has much more options for the gpios
so this is a complete new driver
2025-02-15 10:23:01 -03:00
Michal Lenc
c70a322ec7 samv7/sam_1wire.c: fix compilation warnings
chip/sam_1wire.c:921:7: warning: implicit declaration of function 'sam_usart0_enableclk' [-Wimplicit-function-declaration]
  921 |       sam_usart0_enableclk();

The same warning applied for other uart/usart peripherals configured
as 1 wire.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2025-02-15 09:51:29 -03:00
Alan Carvalho de Assis
edba1b5701 DOC: Fix documentation to include checkpatch.sh
Unfortunately new contributors used to submit code with many coding
issues. And in fact it is our guilt: our codign style documentation
doesn't say to them how to use the checkpatch to find the issues.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-02-14 18:25:44 +01:00
Alan Carvalho de Assis
3594f9d879 stm32: Add support to TIOCGICOUNT ioctl
This commit adds support to TIOCGICOUNT for STM32, this way a
userspace application can collect information about UART errors.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-02-14 18:24:47 +01:00
Alan Carvalho de Assis
5a6e5a8fb4 serial: Add struct serial_icounter_s and CONFIG_SERIAL_TIOCGICOUNT
This commit add support to the serial_icounter_s struct used with
TIOCGICOUNT to report U[S]ART errors such as frame, parity, overrun,
etc.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-02-14 18:24:47 +01:00
Huang Qi
285a846af1 docs: Add editor integration guide for Rust development in NuttX
Summary:
- Added a section on editor integration for Rust development in NuttX, focusing on VS Code and rust-analyzer
- Provides steps to configure `.vscode/settings.json` to recognize Rust project structure and optional settings for custom target specifications

Impact:
- Enhances developer productivity by providing better IDE support for Rust in NuttX
- No impact on existing functionality; the guide is purely informational and configuration-based

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2025-02-14 13:23:13 -03:00
Peter van der Perk
4907607f3a imx95: make gpio irq configurable per bank
This avoids receiving interrupt from unused GPIO banks
2025-02-14 11:37:04 -03:00
Matteo Golin
576a9990c5 drivers/sensors/lsm6dso32: Fixed typo in device address registration.
The valid addresses should be 0x6a and 0x6b, not 0x6c. Now the device
can be registered with the correct addresses without failing the
assertion.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-02-14 10:37:21 +01:00
raiden00pl
107b37561b boards/nucleo-f303re: fix CAN bit timings
boards/nucleo-f303re: fix CAN bit timings, calculated with http://www.bittiming.can-wiki.info/

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-02-14 10:36:23 +01:00
raiden00pl
a62078bb43 boards/b-g431b-esc1: fix CAN bit timings
boards/b-g431b-esc1: fix CAN bit timings, calculated with https://phryniszak.github.io/stm32g-fdcan/

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-02-14 10:36:23 +01:00
raiden00pl
292906472e boards/nucleo-f446re: fix CAN bit timings
boards/nucleo-f446re: fix CAN bit timings, calculated with http://www.bittiming.can-wiki.info/

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-02-14 10:36:23 +01:00
raiden00pl
fa062daeec boards/nucleo-f302r8: fix CAN bit timings
boards/nucleo-f302r8: fix CAN bit timings, calculated with http://www.bittiming.can-wiki.info/

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-02-14 10:36:23 +01:00
raiden00pl
cbba667112 boards/nucleo-g431rb: fix CAN bit timings and unify bitrate
boards/nucleo-g431rb: fix CAN bit timings, calculated with https://phryniszak.github.io/stm32g-fdcan/

also update bit rate to 250000 so it's the same as for other stm32 boards

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-02-14 10:36:23 +01:00
raiden00pl
fb6e6b4b3a boards/nucleo-f722ze: fix CAN bit timings
boards/nucleo-f722ze: fix CAN bit timings, calculated with http://www.bittiming.can-wiki.info/

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-02-14 10:36:23 +01:00
Tiago Medicci Serrano
fc3babb113 arch/risc-v: move stack boundary check into backtrace
This modification moves the boundary check inside backtrace function.
Affects builds with CONFIG_ARCH_INTERRUPSTACK>15.
2025-02-14 09:40:38 +08:00