Modify types.h and inttypes.h to use the correct _int32_t and _uint32_t types.
Type is now defined according to recent compiler versions.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Renaming "modlib" to "libelf" is more in line with the implementation content,
which makes it easier for individual developers to understand the capabilities of this module.
CONFIG_LIBC_MODLIB -> CONFIG_LIBC_ELF
Signed-off-by: chao an <anchao.archer@bytedance.com>
test:
1.use mps3-an547 build helloxx as module and run it
2.use qemu-armv7a:knsh test kernel build helloxx and run it
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
This commit fixes the SPI flash frequency selection for ESP32-S2,
enabling the Kconfig macros to be selected when ESP32-S2 SoC is
enabled. Please note that this was recently changed to make it
compatible with already existing SPI flash Kconfig macros for ESP32
and ESP32-S3 and it introduced this regression for ESP32-S2.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Remove legacy I2S implementation without breaking defconfigs for Xtensa based Espressif devices
Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
SPI flash operation modes - Dual Output (dout), Dual I/O (dio),
Quad Output (qout), Quad I/O (qio) and Octal (opi) were not being
properly selected. This commit fixes this behavior and the device
is now able to boot and initialize the proper SPI flash mode.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit simplifies the selection of the SPI flash frequency for
Espressif SoCs by using a standardized Kconfig-defined macro.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit moves some internal libraries' .bss sections to the
external PSRAM chip, freeing internal memory for other usages. Note
that it is necessary to update `esp32s3-devkit:python` defconfig
otherwise it would fail to build.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
fix printf warning:
chip/esp32s3_wdt_lowerhalf.c:497:17: error: format '%u' expects argument of
type 'unsigned int', but argument 4 has type 'long unsigned int'
Signed-off-by: raiden00pl <raiden00@railab.me>
fix printf warning:
chip/esp32s2_wdt_lowerhalf.c:493:17: error: format '%u' expects argument of
type 'unsigned int', but argument 4 has type 'long unsigned int'
Signed-off-by: raiden00pl <raiden00@railab.me>
fix printf warning:
chip/esp32s3_ble_adapter.c:1065:13: error: format '%u' expects argument of
type 'unsigned int', but argument 3 has type 'long unsigned int'
Signed-off-by: raiden00pl <raiden00@railab.me>
fix printf warning:
chip/esp32_ble_adapter.c:1137:13: error: format '%u' expects argument of
type 'unsigned int', but argument 3 has type 'long unsigned int'
Signed-off-by: raiden00pl <raiden00@railab.me>
share the f_inode, ensuring that the mapping status is associated with
the file entity rather than a single descriptor.
Avoid redundant mapping operations caused by multiple descriptors
operating on the same file.
Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
The CONFIG item is beneficial for startup performance tuning, so
it would be better to have it in Nuttx as well.
Co-authored-by: FunatsuTaishi <51806905+FunatsuTaishi@users.noreply.github.com>
Co-authored-by: Roy Feng <roy.feng@sony.com>
Signed-off-by: Tim Kan(SSS) <tim.kan@sony.com>
Relocate the enum ota_img_ctrl_e and ota_img_bootseq_e
to a directory visible to the application.
Inspect if the MTD partition (factory/ota_0/ota_1) is mapped as text.
Adding an ioctl interface ota_invalidate_bootseq() to the ESP32 partitions,
by deleting the corresponding otadata, makes the boot sequence (ota_0/1) invalid.
Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
Fix I2C Slave driver write bug when multiple write operation existed for Xtensa based Espressif devices
Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
Add missing files which are causing I2C Slave driver build error for Xtensa based Espressif devices
Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
The current default number of IRQ state lists for PHY initialization is 3 (i.e. NR_IRQSTATE_FLAGS).
When calling in a nested manner, the number of times the concurrent behavior enters the critical section exceeds 3, which will trigger an assert crash.
Therefore, the size of NR_IRQSTATE_FLAGS needs to be increased, this PR makes NR_IRQSTATE_FLAGS configurable.
Please refer to the changes of esp-hal-3rdparty: 5d4868f08b
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
Modify addressing to allow only 2 byte node address.
Allow modifying the node address by modifying the ipv6 address
(the ipv6 address has a direct relation with the node address)
Introduce the option to add a 4 byte random number to the mac header
as a preparation for ciphered data exchange.
Introduce a FCB (frame control byte) as a replacement for the INFO
field in the mac header.
Update esp32-devkitc:espnow config to reflect address size change.
Update the documentation to reflect address size changes.
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
To avoid level-1 interrupt break retrieve PC/A0/SP/A2 register,
PS.EXCM set to 1 by CPU HW while handling exception/interrupt.
But if context switching happens and new thread created,
the thread initial value of PS.EXCM is used.
Same behevior as ESP-IDF code:
https://github.com/espressif/esp-idf/blob/master/
components/freertos/FreeRTOS-Kernel/portable/xtensa/port.c#L366
Signed-off-by: Gao Feng <Feng.Gao@sony.com>
Update the wireless symbols from ESP32_* to ESPRESSIF_* for using common layer.
Remove ESP32 specific WiFi files and edit build system to use common layer.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
This commit implements re-enabling the cache before the exception
handler for ESP32-S3 and removes unnecessary checks (cache should
always be re-enabled during an exception handler and disabled again
after processed, except for ESP32-S3 that implements no recoverable
exceptions).
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit allows placing .bss data into the external PSRAM.
Previously, the PSRAM was fully allocated to the heap memory only
and now part of it can be used to allocate .bss data freeing the
internal memory.
on ESP32, cpuint was allocated when register wdt handler, but not
deallocated when unregister, which cause debug assert when checking
`DEBUGASSERT((*freeints & bitmask) == 0)`, so set cpuint to initial value
after deallocate.
The same issue on ESP32s3 has been fixed by PR#15433
